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author | Chen-Yu Tsai <wens@csie.org> | 2018-03-15 12:41:35 +0100 |
---|---|---|
committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-03-19 22:13:01 +0100 |
commit | 02104704823f811e53e177dde9331f4c9373d1cd (patch) | |
tree | 14ff9bb67ddb5aefb1fc399ed9f8944579bbaf87 /arch/arm/boot/dts/sun9i-a80.dtsi | |
parent | ARM: dts: sun9i: Add device nodes for documented display pipelines for A80 (diff) | |
download | linux-02104704823f811e53e177dde9331f4c9373d1cd.tar.xz linux-02104704823f811e53e177dde9331f4c9373d1cd.zip |
ARM: dts: sun9i: Add pinmux settings for LCD0 RGB888 output.
The A80 supports RGB888 with H/V sync from LCD0. Add a pinmux setting
for the needed pins.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'arch/arm/boot/dts/sun9i-a80.dtsi')
-rw-r--r-- | arch/arm/boot/dts/sun9i-a80.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index 6fdb4eaa2e04..25591d6883ef 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -953,6 +953,17 @@ function = "i2c3"; }; + lcd0_rgb888_pins: lcd0-rgb888-pins { + pins = "PD0", "PD1", "PD2", "PD3", + "PD4", "PD5", "PD6", "PD7", + "PD8", "PD9", "PD10", "PD11", + "PD12", "PD13", "PD14", "PD15", + "PD16", "PD17", "PD18", "PD19", + "PD20", "PD21", "PD22", "PD23", + "PD24", "PD25", "PD26", "PD27"; + function = "lcd0"; + }; + mmc0_pins: mmc0-pins { pins = "PF0", "PF1" ,"PF2", "PF3", "PF4", "PF5"; |