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authorStefan Roese <sr@denx.de>2012-11-19 12:09:40 +0100
committerMaxime Ripard <maxime.ripard@free-electrons.com>2012-11-20 15:36:00 +0100
commitde0bf33fc2b0b1d4b1419adf645fb36e9e52781a (patch)
tree3692e4eaf3ab21bd4ccbd64b7b10f405232b6415 /arch/arm/boot/dts/sunxi.dtsi
parentARM: sunxi: Add entry to MAINTAINERS (diff)
downloadlinux-de0bf33fc2b0b1d4b1419adf645fb36e9e52781a.tar.xz
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ARM: sunxi: Restructure sunxi dts/dtsi files
For the new sun4i/Cubieboard (A10) support, lets re-strucure the sun5i dts files to make it more generic. Those are the new dts/dtsi files: sunxi.dtsi - Devices common to all Allwinner sunXi SoC's sun4i.dtsi - sun4i Devices, will include sunxi.dtsi sun5i.dtsi - sun5i Devices, will include sunxi.dtsi board.dts - will include either sun4i.dtsi or sun5i.dtsi Additionally the "duart" label in the olinuxino.dts is changed to "uart1". Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sunxi.dtsi')
-rw-r--r--arch/arm/boot/dts/sunxi.dtsi66
1 files changed, 66 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sunxi.dtsi b/arch/arm/boot/dts/sunxi.dtsi
new file mode 100644
index 000000000000..9e476deb8809
--- /dev/null
+++ b/arch/arm/boot/dts/sunxi.dtsi
@@ -0,0 +1,66 @@
+/*
+ * Copyright 2012 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+ interrupt-parent = <&intc>;
+
+ cpus {
+ cpu@0 {
+ compatible = "arm,cortex-a8";
+ };
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ osc: oscillator {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ };
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x01c20000 0x300000>;
+ ranges;
+
+ timer@01c20c00 {
+ compatible = "allwinner,sunxi-timer";
+ reg = <0x01c20c00 0x400>;
+ interrupts = <22>;
+ clocks = <&osc>;
+ };
+
+ intc: interrupt-controller@01c20400 {
+ compatible = "allwinner,sunxi-ic";
+ reg = <0x01c20400 0x400>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ uart1: uart@01c28400 {
+ compatible = "ns8250";
+ reg = <0x01c28400 0x400>;
+ interrupts = <2>;
+ reg-shift = <2>;
+ clock-frequency = <24000000>;
+ status = "disabled";
+ };
+ };
+};