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authorThierry Reding <treding@nvidia.com>2014-09-24 15:41:41 +0200
committerThierry Reding <treding@nvidia.com>2014-12-04 16:16:15 +0100
commit32215e716008160aadda99669f98a8b735e829fa (patch)
treeeb08605cb077cf618ba2275c0f24038c79a16c6e /arch/arm/boot/dts/tegra114.dtsi
parentARM: tegra: Enable IOMMU for display controllers on Tegra30 (diff)
downloadlinux-32215e716008160aadda99669f98a8b735e829fa.tar.xz
linux-32215e716008160aadda99669f98a8b735e829fa.zip
ARM: tegra: Enable IOMMU for display controllers on Tegra114
Add iommus properties to the device tree nodes for the two display controllers found on Tegra114. This will allow the display controllers to map physically non-contiguous buffers to I/O virtual contiguous address spaces so that they can be used for scan-out. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra114.dtsi')
-rw-r--r--arch/arm/boot/dts/tegra114.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 2c26b07c11ed..c8c3b6438b4d 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -1,5 +1,6 @@
#include <dt-bindings/clock/tegra114-car.h>
#include <dt-bindings/gpio/tegra-gpio.h>
+#include <dt-bindings/memory/tegra114-mc.h>
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -57,6 +58,8 @@
resets = <&tegra_car 27>;
reset-names = "dc";
+ iommus = <&mc TEGRA_SWGROUP_DC>;
+
nvidia,head = <0>;
rgb {
@@ -74,6 +77,8 @@
resets = <&tegra_car 26>;
reset-names = "dc";
+ iommus = <&mc TEGRA_SWGROUP_DCB>;
+
nvidia,head = <1>;
rgb {