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authorStephen Warren <swarren@nvidia.com>2013-11-01 00:23:05 +0100
committerStephen Warren <swarren@nvidia.com>2013-12-16 22:09:18 +0100
commit784c7444f052dda27db8d40ed35b57aefd2e04b8 (patch)
tree4db46e83d29084757d11d25ead7a0b5c5c3e6486 /arch/arm/boot/dts/tegra124-venice2.dts
parentARM: tegra: add Tegra124 pinmux node to DT (diff)
downloadlinux-784c7444f052dda27db8d40ed35b57aefd2e04b8.tar.xz
linux-784c7444f052dda27db8d40ed35b57aefd2e04b8.zip
ARM: tegra: add MMC controllers to Tegra124 DT
Tegra124 has 4 MMC controllers just like previous versions of the SoC. Note that there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. Also enable the relevant controllers in the Venice2 board DT. power-gpios property suggested by Thierry Reding. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra124-venice2.dts')
-rw-r--r--arch/arm/boot/dts/tegra124-venice2.dts12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
index 956b6e78255e..f765c822bb14 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -25,6 +25,18 @@
nvidia,sys-clock-req-active-high;
};
+ sdhci@700b0400 {
+ cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
+ power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ bus-width = <4>;
+ };
+
+ sdhci@700b0600 {
+ status = "okay";
+ bus-width = <8>;
+ };
+
clocks {
compatible = "simple-bus";
#address-cells = <1>;