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authorThierry Reding <treding@nvidia.com>2014-06-26 07:33:34 +0200
committerThierry Reding <treding@nvidia.com>2014-07-17 15:02:12 +0200
commitd86b1e8dcb26f38757bfd307478fa45285aac004 (patch)
tree6528d6c2fea62cc0c70b72d9af1f919829e7c86c /arch/arm/boot/dts/tegra124.dtsi
parentARM: tegra: of: add GK20A device tree binding (diff)
downloadlinux-d86b1e8dcb26f38757bfd307478fa45285aac004.tar.xz
linux-d86b1e8dcb26f38757bfd307478fa45285aac004.zip
ARM: tegra: add GK20A GPU to Tegra124 DT
Add the GK20A device node to Tegra124's device tree. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra124.dtsi')
-rw-r--r--arch/arm/boot/dts/tegra124.dtsi15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index d675186d8eba..cc9e7504c2da 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -102,6 +102,21 @@
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
+ gpu@0,57000000 {
+ compatible = "nvidia,gk20a";
+ reg = <0x0 0x57000000 0x0 0x01000000>,
+ <0x0 0x58000000 0x0 0x01000000>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "stall", "nonstall";
+ clocks = <&tegra_car TEGRA124_CLK_GPU>,
+ <&tegra_car TEGRA124_CLK_PLL_P_OUT5>;
+ clock-names = "gpu", "pwr";
+ resets = <&tegra_car 184>;
+ reset-names = "gpu";
+ status = "disabled";
+ };
+
timer@0,60005000 {
compatible = "nvidia,tegra124-timer", "nvidia,tegra20-timer";
reg = <0x0 0x60005000 0x0 0x400>;