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| author | Stephen Warren <swarren@nvidia.com> | 2013-01-02 22:53:22 +0100 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2013-01-28 19:24:07 +0100 |
| commit | 11a3c868f923b1c0b7a5c532881883b7db077ec3 (patch) | |
| tree | 160c783ef62e0d67a7aa2a2bf9a3fa7e5d36035d /arch/arm/boot/dts/tegra20-paz00.dts | |
| parent | ARM: tegra: ventana: enable HDMI port (diff) | |
| download | linux-11a3c868f923b1c0b7a5c532881883b7db077ec3.tar.xz linux-11a3c868f923b1c0b7a5c532881883b7db077ec3.zip | |
ARM: tegra: paz00: enable HDMI port
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20-paz00.dts')
| -rw-r--r-- | arch/arm/boot/dts/tegra20-paz00.dts | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts index a965fe9c7aa1..2e94d34d9e61 100644 --- a/arch/arm/boot/dts/tegra20-paz00.dts +++ b/arch/arm/boot/dts/tegra20-paz00.dts @@ -10,6 +10,18 @@ reg = <0x00000000 0x20000000>; }; + host1x { + hdmi { + status = "okay"; + + vdd-supply = <&hdmi_vdd_reg>; + pll-supply = <&hdmi_pll_reg>; + + nvidia,ddc-i2c-bus = <&hdmi_ddc>; + nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */ + }; + }; + pinmux { pinctrl-names = "default"; pinctrl-0 = <&state_default>; @@ -252,9 +264,9 @@ }; }; - i2c@7000c400 { + hdmi_ddc: i2c@7000c400 { status = "okay"; - clock-frequency = <400000>; + clock-frequency = <100000>; }; nvec { @@ -369,13 +381,13 @@ regulator-max-microvolt = <1800000>; }; - ldo7 { + hdmi_vdd_reg: ldo7 { regulator-name = "+3.3vs_ldo7,avdd_hdmi"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - ldo8 { + hdmi_pll_reg: ldo8 { regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; |