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| author | Dmitry Osipenko <digetx@gmail.com> | 2021-12-01 00:23:43 +0100 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2021-12-16 14:23:17 +0100 |
| commit | 83b7f0b8aeab4fc8271392fd32164efb7b3f55e9 (patch) | |
| tree | 8f687f28265d496e117b0c3f9f3f56c4ca13af60 /arch/arm/boot/dts/tegra20-ventana.dts | |
| parent | ARM: tegra: Add 500 MHz entry to Tegra30 memory OPP table (diff) | |
| download | linux-83b7f0b8aeab4fc8271392fd32164efb7b3f55e9.tar.xz linux-83b7f0b8aeab4fc8271392fd32164efb7b3f55e9.zip | |
ARM: tegra: Add OPP tables and power domains to Tegra20 device-trees
Add OPP tables and power domains to all peripheral devices which
support power management on Tegra20 SoC.
Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20-ventana.dts')
| -rw-r--r-- | arch/arm/boot/dts/tegra20-ventana.dts | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts index b1c92ba789be..b0a00970b61c 100644 --- a/arch/arm/boot/dts/tegra20-ventana.dts +++ b/arch/arm/boot/dts/tegra20-ventana.dts @@ -544,6 +544,7 @@ nvidia,core-pwr-good-time = <3845 3845>; nvidia,core-pwr-off-time = <458>; nvidia,sys-clock-req-active-high; + core-supply = <&vdd_core>; }; usb@c5000000 { |