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authorStephen Warren <swarren@nvidia.com>2013-01-28 19:22:46 +0100
committerStephen Warren <swarren@nvidia.com>2013-01-28 19:22:46 +0100
commitee059485175b21079d3639f167980d354afb3d4b (patch)
tree30bf32ec57ba915d31348c1b603481baf42c81dd /arch/arm/boot/dts/tegra20.dtsi
parentARM: tegra20: cpuidle: apply coupled cpuidle for powered-down mode (diff)
parentARM: OMAP: Make use of available scu_a9_get_base() interface (diff)
downloadlinux-ee059485175b21079d3639f167980d354afb3d4b.tar.xz
linux-ee059485175b21079d3639f167980d354afb3d4b.zip
Merge branch 'for-3.9/scu-base-rework' into for-3.9/soc-t114
Conflicts: arch/arm/mach-tegra/platsmp.c
Diffstat (limited to 'arch/arm/boot/dts/tegra20.dtsi')
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 649391579871..2e7c83c7253b 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -489,6 +489,23 @@
status = "disabled";
};
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <1>;
+ };
+ };
+
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 56 0x04