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author | Stephen Warren <swarren@nvidia.com> | 2013-01-11 08:46:22 +0100 |
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committer | Stephen Warren <swarren@nvidia.com> | 2013-01-28 19:19:06 +0100 |
commit | 270f8ce3122b12f4224f7c72806ebf05e23835a6 (patch) | |
tree | 9bffda414b6f97da974041af07e24179824672b4 /arch/arm/boot/dts/tegra20.dtsi | |
parent | ARM: tegra: move tegra_cpu_car.h to linux/clk/tegra.h (diff) | |
download | linux-270f8ce3122b12f4224f7c72806ebf05e23835a6.tar.xz linux-270f8ce3122b12f4224f7c72806ebf05e23835a6.zip |
ARM: tegra: define Tegra20 CAR binding
The Tegra20 CAR (Clock And Reset) Controller controls most aspects of
most clocks within Tegra20. The device tree binding models this as a
single monolithic clock provider, which exports many clocks. This reduces
the number of nodes needed in device tree to represent these clocks.
This binding is only useful for Tegra20; the set of clocks that exists on
Tegra30 is sufficiently different to merit its own binding.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
[pgaikwad: Added mux clk ids and sorted CAR node]
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20.dtsi')
-rw-r--r-- | arch/arm/boot/dts/tegra20.dtsi | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index b8effa1cbda7..5b104f1d5003 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -123,6 +123,12 @@ 0 42 0x04>; }; + tegra_car: clock { + compatible = "nvidia,tegra20-car"; + reg = <0x60006000 0x1000>; + #clock-cells = <1>; + }; + apbdma: dma { compatible = "nvidia,tegra20-apbdma"; reg = <0x6000a000 0x1200>; |