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authorStephen Warren <swarren@nvidia.com>2013-12-09 22:43:59 +0100
committerStephen Warren <swarren@nvidia.com>2013-12-18 22:10:48 +0100
commit553c0a200e2082686fd9b829b77f7df6ebae14e9 (patch)
tree7ae43ea30413b44980f51886154f6e1c0d721606 /arch/arm/boot/dts/tegra30-beaver.dts
parentARM: tegra: Add SPI controller nodes for Tegra124 (diff)
downloadlinux-553c0a200e2082686fd9b829b77f7df6ebae14e9.tar.xz
linux-553c0a200e2082686fd9b829b77f7df6ebae14e9.zip
ARM: tegra: set up /aliases entries for RTCs
This ensures that the PMIC RTC provides the system time, rather than the on-SoC RTC, which is not battery-backed. tegra124-venice2.dts isn't touched yet since we haven't added any off- SoC RTC device to its device tree. Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra30-beaver.dts')
-rw-r--r--arch/arm/boot/dts/tegra30-beaver.dts5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts
index 7e8562a8507d..d36c8212dcbf 100644
--- a/arch/arm/boot/dts/tegra30-beaver.dts
+++ b/arch/arm/boot/dts/tegra30-beaver.dts
@@ -6,6 +6,11 @@
model = "NVIDIA Tegra30 Beaver evaluation board";
compatible = "nvidia,beaver", "nvidia,tegra30";
+ aliases {
+ rtc0 = "/i2c@7000d000/tps65911@2d";
+ rtc1 = "/rtc@7000e000";
+ };
+
memory {
reg = <0x80000000 0x7ff00000>;
};