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authorLaxman Dewangan <ldewangan@nvidia.com>2013-01-11 14:33:03 +0100
committerStephen Warren <swarren@nvidia.com>2013-01-28 19:24:08 +0100
commit699ed4b94c6278ab0f629fde261af78cd1458f73 (patch)
tree7d17a2c8ec60cfba49b4ce8a45a0de24def25097 /arch/arm/boot/dts/tegra30.dtsi
parentARM: tegra: swap cache-/interrupt-ctrlr nodes in DT (diff)
downloadlinux-699ed4b94c6278ab0f629fde261af78cd1458f73.tar.xz
linux-699ed4b94c6278ab0f629fde261af78cd1458f73.zip
ARM: tegra: add DT entry for KBC controller
NVIDIA's Tegra SoCs have the matrix keyboard controller which supports 16x8 type of matrix. The number of rows and columns are configurable. Add DT entry for KBC controller. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: added clocks property] Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra30.dtsi')
-rw-r--r--arch/arm/boot/dts/tegra30.dtsi8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index a67fc13ec36d..ff4a0ca45983 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -413,6 +413,14 @@
status = "disabled";
};
+ kbc {
+ compatible = "nvidia,tegra30-kbc", "nvidia,tegra20-kbc";
+ reg = <0x7000e200 0x100>;
+ interrupts = <0 85 0x04>;
+ clocks = <&tegra_car 36>;
+ status = "disabled";
+ };
+
pmc {
compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc";
reg = <0x7000e400 0x400>;