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| author | Thierry Reding <treding@nvidia.com> | 2020-06-11 19:52:07 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2020-06-25 09:29:44 +0200 |
| commit | f538588bdbc8d1c4bc79311a5e7f84224ffcda7a (patch) | |
| tree | d53ffca6e04c7aa544163d26d3549e1bc7275017 /arch/arm/boot/dts/tegra30.dtsi | |
| parent | ARM: tegra: Fix order of XUSB controller clocks (diff) | |
| download | linux-f538588bdbc8d1c4bc79311a5e7f84224ffcda7a.tar.xz linux-f538588bdbc8d1c4bc79311a5e7f84224ffcda7a.zip | |
ARM: tegra: Add missing clock-names for SDHCI controllers
The Tegra SDHCI controllers need to have a clock-names property
according to the bindings.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra30.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/tegra30.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index a3ea45c43bdf..def18a86a36a 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -858,6 +858,7 @@ reg = <0x78000000 0x200>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_SDMMC1>; + clock-names = "sdhci"; resets = <&tegra_car 14>; reset-names = "sdhci"; status = "disabled"; @@ -868,6 +869,7 @@ reg = <0x78000200 0x200>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_SDMMC2>; + clock-names = "sdhci"; resets = <&tegra_car 9>; reset-names = "sdhci"; status = "disabled"; @@ -878,6 +880,7 @@ reg = <0x78000400 0x200>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_SDMMC3>; + clock-names = "sdhci"; resets = <&tegra_car 69>; reset-names = "sdhci"; status = "disabled"; @@ -888,6 +891,7 @@ reg = <0x78000600 0x200>; interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_SDMMC4>; + clock-names = "sdhci"; resets = <&tegra_car 15>; reset-names = "sdhci"; status = "disabled"; |