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authorMasahiro Yamada <yamada.masahiro@socionext.com>2017-08-27 14:02:31 +0200
committerMasahiro Yamada <yamada.masahiro@socionext.com>2017-08-28 16:58:48 +0200
commit7b8330d28c63807fbdfe9884e65d5ab482a4b3ad (patch)
tree4e2208e2881f56ab927e77884e4901bc78bd0e7e /arch/arm/boot/dts/uniphier-pxs2.dtsi
parentARM: dts: uniphier: add AIDET nodes (diff)
downloadlinux-7b8330d28c63807fbdfe9884e65d5ab482a4b3ad.tar.xz
linux-7b8330d28c63807fbdfe9884e65d5ab482a4b3ad.zip
ARM: dts: uniphier: fix size of sdctrl nodes
All registers are located within 0x400 size from the base address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/boot/dts/uniphier-pxs2.dtsi')
-rw-r--r--arch/arm/boot/dts/uniphier-pxs2.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index 37bbaa4b4de5..90b020c95083 100644
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -276,7 +276,7 @@
sdctrl@59810000 {
compatible = "socionext,uniphier-pxs2-sdctrl",
"simple-mfd", "syscon";
- reg = <0x59810000 0x800>;
+ reg = <0x59810000 0x400>;
sd_clk: clock {
compatible = "socionext,uniphier-pxs2-sd-clock";