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authorRob Herring <rob.herring@calxeda.com>2013-02-07 04:15:09 +0100
committerRob Herring <rob.herring@calxeda.com>2013-04-11 22:11:19 +0200
commit34c2e5feeb0164baef76555141ad5b8dc84394bb (patch)
tree98cc431e215ae50ce4186c5ffc63ee3ddd5494ad /arch/arm/boot/dts/vexpress-v2p-ca9.dts
parentARM: vexpress: remove sp804 OF init (diff)
downloadlinux-34c2e5feeb0164baef76555141ad5b8dc84394bb.tar.xz
linux-34c2e5feeb0164baef76555141ad5b8dc84394bb.zip
ARM: dts: vexpress: disable CA9 core tile sp804 timer
The motherboard sp804 timer is used, but core tile sp804 timer is not. According to Russell King, the clock configuration is undocumented and defaults to 32kHz which is not desireable. So mark core tile sp804 timer as disabled. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Diffstat (limited to 'arch/arm/boot/dts/vexpress-v2p-ca9.dts')
-rw-r--r--arch/arm/boot/dts/vexpress-v2p-ca9.dts1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
index 1420bb14d95c..62d9b225dcce 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca9.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
@@ -98,6 +98,7 @@
<0 49 4>;
clocks = <&oscclk2>, <&oscclk2>;
clock-names = "timclk", "apb_pclk";
+ status = "disabled";
};
watchdog@100e5000 {