diff options
| author | Stefan Agner <stefan@agner.ch> | 2014-11-28 00:40:06 +0100 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2015-01-05 13:43:48 +0100 |
| commit | eddb00fa125bb77452dd875e7d8170c8d3c4d546 (patch) | |
| tree | 8403997abd95261cb0da5ed515a83e336b0042f3 /arch/arm/boot/dts/vf-colibri.dtsi | |
| parent | ARM: dts: vf610: enable watchdog for Cortex-A5 dt's (diff) | |
| download | linux-eddb00fa125bb77452dd875e7d8170c8d3c4d546.tar.xz linux-eddb00fa125bb77452dd875e7d8170c8d3c4d546.zip | |
ARM: dts: vf-colibri: add CLKOUT pin to pinctrl of FEC1
On the Colibri module, the RMII clock for the Ethernet PHY is
generated by the SoC. This patch adds that missing pin to the
pinctrl of FEC1. Because the boot loader initializes this pin,
ethernet worked even without this pin so far.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/vf-colibri.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/vf-colibri.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/vf-colibri.dtsi b/arch/arm/boot/dts/vf-colibri.dtsi index 82f5728be5c9..95b6ff222eee 100644 --- a/arch/arm/boot/dts/vf-colibri.dtsi +++ b/arch/arm/boot/dts/vf-colibri.dtsi @@ -121,6 +121,7 @@ pinctrl_fec1: fec1grp { fsl,pins = < + VF610_PAD_PTA6__RMII_CLKOUT 0x30d2 VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3 VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1 |