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authorMoritz Fischer <moritz.fischer@ettus.com>2015-07-31 03:13:55 +0200
committerOlof Johansson <olof@lixom.net>2015-08-21 18:10:00 +0200
commit99650c258a4bbe7e62754c734c3888f29b59f72a (patch)
tree5ee1bb70e326df5de2035dacd6f682f4f27c2895 /arch/arm/boot/dts/zynq-7000.dtsi
parentARM: dts: UniPhier: fix PPI interrupt CPU mask of timer nodes (diff)
downloadlinux-99650c258a4bbe7e62754c734c3888f29b59f72a.tar.xz
linux-99650c258a4bbe7e62754c734c3888f29b59f72a.zip
ARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/zynq-7000.dtsi')
-rw-r--r--arch/arm/boot/dts/zynq-7000.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index ac0a6a09b652..dc0457e40775 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -259,6 +259,13 @@
reg = <0x100 0x100>;
};
+ rstc: rstc@200 {
+ compatible = "xlnx,zynq-reset";
+ reg = <0x200 0x48>;
+ #reset-cells = <1>;
+ syscon = <&slcr>;
+ };
+
pinctrl0: pinctrl@700 {
compatible = "xlnx,pinctrl-zynq";
reg = <0x700 0x200>;