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authorSoren Brinkmann <soren.brinkmann@xilinx.com>2014-04-04 23:27:56 +0200
committerMichal Simek <michal.simek@xilinx.com>2014-04-22 09:30:49 +0200
commit0f6faa3fc909482c2b40161de9bcf0d5460e54c5 (patch)
treef0909f3b704fb590958b97440d96ebbcf6fe6e06 /arch/arm/boot/dts/zynq-7000.dtsi
parentARM: zynq: DT: Add 'clock-latency' property (diff)
downloadlinux-0f6faa3fc909482c2b40161de9bcf0d5460e54c5.tar.xz
linux-0f6faa3fc909482c2b40161de9bcf0d5460e54c5.zip
ARM: zynq: dt: Add I2C nodes to Zynq device tree
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/boot/dts/zynq-7000.dtsi')
-rw-r--r--arch/arm/boot/dts/zynq-7000.dtsi22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index c39baefcfd76..c1176abc34d9 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -55,6 +55,28 @@
interrupt-parent = <&intc>;
ranges;
+ i2c0: zynq-i2c@e0004000 {
+ compatible = "cdns,i2c-r1p10";
+ status = "disabled";
+ clocks = <&clkc 38>;
+ interrupt-parent = <&intc>;
+ interrupts = <0 25 4>;
+ reg = <0xe0004000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c1: zynq-i2c@e0005000 {
+ compatible = "cdns,i2c-r1p10";
+ status = "disabled";
+ clocks = <&clkc 39>;
+ interrupt-parent = <&intc>;
+ interrupts = <0 48 4>;
+ reg = <0xe0005000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
intc: interrupt-controller@f8f01000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;