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authorLinus Walleij <linus.walleij@linaro.org>2014-10-10 15:07:55 +0200
committerLinus Walleij <linus.walleij@linaro.org>2014-10-22 13:49:11 +0200
commit24ec3ff329b99427cd2b42d0da3f9e3a6b91dae7 (patch)
tree1c229fdde616ad3f90ef34ee85dc915516d1cfb6 /arch/arm/boot/dts
parentARM: realview: add RTC clocks to device tree (diff)
downloadlinux-24ec3ff329b99427cd2b42d0da3f9e3a6b91dae7.tar.xz
linux-24ec3ff329b99427cd2b42d0da3f9e3a6b91dae7.zip
ARM: realview: add PL022 SSP/SPI block to PB1176 DTS
Add the PL022 SSP/SPI block to the PL1176 DTS file, also define the separate SSPCLK clock derived from the 24MHz chrystal. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/arm-realview-pb1176.dts17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/arm-realview-pb1176.dts b/arch/arm/boot/dts/arm-realview-pb1176.dts
index 0e5b608ab9db..313a71756a18 100644
--- a/arch/arm/boot/dts/arm-realview-pb1176.dts
+++ b/arch/arm/boot/dts/arm-realview-pb1176.dts
@@ -56,6 +56,14 @@
clocks = <&xtal24mhz>;
};
+ sspclk: sspclk@24M {
+ #clock-cells = <0>;
+ compatible = "fixed-factor-clock";
+ clock-div = <1>;
+ clock-mult = <1>;
+ clocks = <&xtal24mhz>;
+ };
+
uartclk: uartclk@24M {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
@@ -218,6 +226,15 @@
clock-names = "apb_pclk";
};
+ pb1176_ssp: ssp@1010b000 {
+ compatible = "arm,pl022", "arm,primecell";
+ reg = <0x1010b000 0x1000>;
+ interrupt-parent = <&intc_dc1176>;
+ interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&sspclk>, <&pclk>;
+ clock-names = "SSPCLK", "apb_pclk";
+ };
+
pb1176_serial0: serial@1010c000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x1010c000 0x1000>;