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| author | Jun Gao <jun.gao@mediatek.com> | 2017-05-26 09:35:07 +0200 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2017-05-31 14:58:17 +0200 |
| commit | 729b7f8dbdaff270c53052897ea06486221a49a2 (patch) | |
| tree | 576984398264b1acd4813004e234ce2efe4a81b1 /arch/arm/boot/dts | |
| parent | arm: dts: mt2701: Add node for Mediatek JPEG Decoder (diff) | |
| download | linux-729b7f8dbdaff270c53052897ea06486221a49a2.tar.xz linux-729b7f8dbdaff270c53052897ea06486221a49a2.zip | |
arm: dts: Add Mediatek MT2701 i2c device node
Add MT2701 i2c device node.
Signed-off-by: Jun Gao <jun.gao@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts')
| -rw-r--r-- | arch/arm/boot/dts/mt2701-evb.dts | 42 | ||||
| -rw-r--r-- | arch/arm/boot/dts/mt2701.dtsi | 42 |
2 files changed, 84 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/mt2701-evb.dts b/arch/arm/boot/dts/mt2701-evb.dts index 0474fd2d602b..98bf12c141cb 100644 --- a/arch/arm/boot/dts/mt2701-evb.dts +++ b/arch/arm/boot/dts/mt2701-evb.dts @@ -28,7 +28,49 @@ status = "okay"; }; +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins_a>; + status = "okay"; +}; + &pio { + i2c0_pins_a: i2c0@0 { + pins1 { + pinmux = <MT2701_PIN_75_SDA0__FUNC_SDA0>, + <MT2701_PIN_76_SCL0__FUNC_SCL0>; + bias-disable; + }; + }; + + i2c1_pins_a: i2c1@0 { + pins1 { + pinmux = <MT2701_PIN_57_SDA1__FUNC_SDA1>, + <MT2701_PIN_58_SCL1__FUNC_SCL1>; + bias-disable; + }; + }; + + i2c2_pins_a: i2c2@0 { + pins1 { + pinmux = <MT2701_PIN_77_SDA2__FUNC_SDA2>, + <MT2701_PIN_78_SCL2__FUNC_SCL2>; + bias-disable; + }; + }; + spi_pins_a: spi0@0 { pins_spi { pinmux = <MT2701_PIN_53_SPI0_CSN__FUNC_SPI0_CS>, diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi index 15537bc47d48..50a483ce5c47 100644 --- a/arch/arm/boot/dts/mt2701.dtsi +++ b/arch/arm/boot/dts/mt2701.dtsi @@ -297,6 +297,48 @@ status = "disabled"; }; + i2c0: i2c@11007000 { + compatible = "mediatek,mt2701-i2c", + "mediatek,mt6577-i2c"; + reg = <0 0x11007000 0 0x70>, + <0 0x11000200 0 0x80>; + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>; + clock-div = <16>; + clocks = <&pericfg CLK_PERI_I2C0>, <&pericfg CLK_PERI_AP_DMA>; + clock-names = "main", "dma"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c1: i2c@11008000 { + compatible = "mediatek,mt2701-i2c", + "mediatek,mt6577-i2c"; + reg = <0 0x11008000 0 0x70>, + <0 0x11000280 0 0x80>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_LOW>; + clock-div = <16>; + clocks = <&pericfg CLK_PERI_I2C1>, <&pericfg CLK_PERI_AP_DMA>; + clock-names = "main", "dma"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c2: i2c@11009000 { + compatible = "mediatek,mt2701-i2c", + "mediatek,mt6577-i2c"; + reg = <0 0x11009000 0 0x70>, + <0 0x11000300 0 0x80>; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_LOW>; + clock-div = <16>; + clocks = <&pericfg CLK_PERI_I2C2>, <&pericfg CLK_PERI_AP_DMA>; + clock-names = "main", "dma"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + spi0: spi@1100a000 { compatible = "mediatek,mt2701-spi"; #address-cells = <1>; |