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| author | Łukasz Stelmach <l.stelmach@samsung.com> | 2017-12-11 09:54:15 +0100 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzk@kernel.org> | 2017-12-11 19:43:12 +0100 |
| commit | 465def2ad492b84eb2234a8892724df8e1edd580 (patch) | |
| tree | 04ab3dd667271f00ee8a5166a11cb6b269ca0229 /arch/arm/boot/dts | |
| parent | ARM: dts: exynos: Add G3D power domain to Exynos5250 (diff) | |
| download | linux-465def2ad492b84eb2234a8892724df8e1edd580.tar.xz linux-465def2ad492b84eb2234a8892724df8e1edd580.zip | |
ARM: dts: exynos: Add DT nodes for PRNG in Exynos5 SoCs
Add nodes for Pseudo Random Number Generator in dts files describing
Exynos5 chips.
Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts')
| -rw-r--r-- | arch/arm/boot/dts/exynos5.dtsi | 5 | ||||
| -rw-r--r-- | arch/arm/boot/dts/exynos5250.dtsi | 5 | ||||
| -rw-r--r-- | arch/arm/boot/dts/exynos5410.dtsi | 5 | ||||
| -rw-r--r-- | arch/arm/boot/dts/exynos5420.dtsi | 5 |
4 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi index 347224589451..6cc5c37a9b2a 100644 --- a/arch/arm/boot/dts/exynos5.dtsi +++ b/arch/arm/boot/dts/exynos5.dtsi @@ -211,6 +211,11 @@ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; }; + prng: rng@10830400 { + compatible = "samsung,exynos5250-prng"; + reg = <0x10830400 0x200>; + }; + g2d: g2d@10850000 { compatible = "samsung,exynos5250-g2d"; reg = <0x10850000 0x1000>; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 232d8801d9e0..e55748798845 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -1061,6 +1061,11 @@ pinctrl-0 = <&i2c3_bus>; }; +&prng { + clocks = <&clock CLK_SSS>; + clock-names = "secss"; +}; + &pwm { clocks = <&clock CLK_PWM>; clock-names = "timers"; diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi index 7b34970e6ac7..f5541000606b 100644 --- a/arch/arm/boot/dts/exynos5410.dtsi +++ b/arch/arm/boot/dts/exynos5410.dtsi @@ -333,6 +333,11 @@ clock-names = "fin_pll", "mct"; }; +&prng { + clocks = <&clock CLK_SSS>; + clock-names = "secss"; +}; + &pwm { clocks = <&clock CLK_PWM>; clock-names = "timers"; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index a44aec348502..3611f5c05235 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -1429,6 +1429,11 @@ clock-names = "fin_pll", "mct"; }; +&prng { + clocks = <&clock CLK_SSS>; + clock-names = "secss"; +}; + &pwm { clocks = <&clock CLK_PWM>; clock-names = "timers"; |