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authorLinus Walleij <linus.walleij@linaro.org>2014-10-08 15:26:52 +0200
committerLinus Walleij <linus.walleij@linaro.org>2014-10-22 13:49:07 +0200
commitc7eb3f4a1bf59ec10e54bcb74b4ce2150f2b5615 (patch)
tree39f618f558809036b5c1c9de5724153dacb27c04 /arch/arm/boot/dts
parentARM: realview: add device tree and bindings for PB1176 (diff)
downloadlinux-c7eb3f4a1bf59ec10e54bcb74b4ce2150f2b5615.tar.xz
linux-c7eb3f4a1bf59ec10e54bcb74b4ce2150f2b5615.zip
ARM: realview: move DT GIC to FPGA node
This creates a node in the device tree to hold the FPGA devices as a "simple-bus" and moves the GIC found on the FPGA to this node, so it reflects the actual topology of the system. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/arm-realview-pb1176.dts32
1 files changed, 20 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/arm-realview-pb1176.dts b/arch/arm/boot/dts/arm-realview-pb1176.dts
index 3135939cd13f..f780adde2332 100644
--- a/arch/arm/boot/dts/arm-realview-pb1176.dts
+++ b/arch/arm/boot/dts/arm-realview-pb1176.dts
@@ -153,18 +153,6 @@
<0x10120000 0x100>;
};
- /* This GIC on the board is cascaded off the DevChip GIC */
- intc_pb1176: interrupt-controller@10040000 {
- compatible = "arm,arm1176jzf-devchip-gic", "arm,arm11mp-gic";
- #interrupt-cells = <3>;
- #address-cells = <1>;
- interrupt-controller;
- reg = <0x10041000 0x1000>,
- <0x10040000 0x100>;
- interrupt-parent = <&intc_dc1176>;
- interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
- };
-
L2: l2-cache {
compatible = "arm,l220-cache";
reg = <0x10110000 0x1000>;
@@ -244,4 +232,24 @@
clock-names = "uartclk", "apb_pclk";
};
};
+
+ /* These peripherals are inside the FPGA rather than the DevChip */
+ fpga {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ ranges;
+
+ /* This GIC on the board is cascaded off the DevChip GIC */
+ intc_fpga1176: interrupt-controller@10040000 {
+ compatible = "arm,arm1176jzf-devchip-gic", "arm,arm11mp-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <1>;
+ interrupt-controller;
+ reg = <0x10041000 0x1000>,
+ <0x10040000 0x100>;
+ interrupt-parent = <&intc_dc1176>;
+ interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
};