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| author | Lionel Debieve <lionel.debieve@st.com> | 2018-05-14 12:00:00 +0200 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@st.com> | 2018-06-25 14:11:46 +0200 |
| commit | 1e726a40e067948ecf90b8ea876bb6038c0c495f (patch) | |
| tree | 4cbe0173ea9101429fe430dace0cded6594a305c /arch/arm/boot/dts | |
| parent | ARM: dts: stm32: update rtc st,syscfg property on stm32f746 (diff) | |
| download | linux-1e726a40e067948ecf90b8ea876bb6038c0c495f.tar.xz linux-1e726a40e067948ecf90b8ea876bb6038c0c495f.zip | |
ARM: dts: stm32: Add HASH support on stm32mp157c
This patch add HASH instance of the stm32mp157c SoC
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Diffstat (limited to 'arch/arm/boot/dts')
| -rw-r--r-- | arch/arm/boot/dts/stm32mp157c.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi index 7d1753893453..db0e643c1638 100644 --- a/arch/arm/boot/dts/stm32mp157c.dtsi +++ b/arch/arm/boot/dts/stm32mp157c.dtsi @@ -709,6 +709,18 @@ status = "disabled"; }; + hash1: hash@54002000 { + compatible = "st,stm32f756-hash"; + reg = <0x54002000 0x400>; + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc HASH1>; + resets = <&rcc HASH1_R>; + dmas = <&mdma1 31 0x10 0x1000A02 0x0 0x0 0x0>; + dma-names = "in"; + dma-maxburst = <2>; + status = "disabled"; + }; + rng1: rng@54003000 { compatible = "st,stm32-rng"; reg = <0x54003000 0x400>; |