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author | John Crispin <john@phrozen.org> | 2017-04-26 11:25:49 +0200 |
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committer | Matthias Brugger <matthias.bgg@gmail.com> | 2017-05-15 10:47:08 +0200 |
commit | 608cc0c006e0b53712c6e339e642546feb1d4a64 (patch) | |
tree | aa08428946c400f4aa0b0eb1c83722b27738d1df /arch/arm/boot/dts | |
parent | arm: dts: mt7623: add subsystem clock controller device nodes (diff) | |
download | linux-608cc0c006e0b53712c6e339e642546feb1d4a64.tar.xz linux-608cc0c006e0b53712c6e339e642546feb1d4a64.zip |
arm: dts: mt7623: add power domain controller device node
Add power domain controller node (scpsys) for MT7623.
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r-- | arch/arm/boot/dts/mt7623.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi index 54cff6ad0611..adb23932c2ca 100644 --- a/arch/arm/boot/dts/mt7623.dtsi +++ b/arch/arm/boot/dts/mt7623.dtsi @@ -15,6 +15,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/mt2701-clk.h> +#include <dt-bindings/power/mt2701-power.h> #include <dt-bindings/reset/mt2701-resets.h> #include "skeleton64.dtsi" @@ -104,6 +105,19 @@ #reset-cells = <1>; }; + scpsys: scpsys@10006000 { + compatible = "mediatek,mt7623-scpsys", + "mediatek,mt2701-scpsys", + "syscon"; + #power-domain-cells = <1>; + reg = <0 0x10006000 0 0x1000>; + infracfg = <&infracfg>; + clocks = <&topckgen CLK_TOP_MM_SEL>, + <&topckgen CLK_TOP_MFG_SEL>, + <&topckgen CLK_TOP_ETHIF_SEL>; + clock-names = "mm", "mfg", "ethif"; + }; + watchdog: watchdog@10007000 { compatible = "mediatek,mt7623-wdt", "mediatek,mt6589-wdt"; |