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authorPeter Ujfalusi <peter.ujfalusi@ti.com>2012-08-29 15:31:07 +0200
committerBenoit Cousson <b-cousson@ti.com>2012-09-07 19:22:58 +0200
commitcbb57f071f4dbd7684e6b7280dbc2286fdcecf0b (patch)
treeb111aaeb5c4b0268c2534f317a5e148b0c3e13c9 /arch/arm/boot
parentARM: dts: omap5: Add McBSP entries (diff)
downloadlinux-cbb57f071f4dbd7684e6b7280dbc2286fdcecf0b.tar.xz
linux-cbb57f071f4dbd7684e6b7280dbc2286fdcecf0b.zip
ARM: dts: omap5: Add McPDM and DMIC section to the dtsi file
To be able to load the McPDM and DMIC driver when booted with device tree. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/omap5.dtsi20
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index aa97e9318def..9ac75b37c992 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -252,6 +252,26 @@
ti,hwmods = "kbd";
};
+ mcpdm: mcpdm@40132000 {
+ compatible = "ti,omap4-mcpdm";
+ reg = <0x40132000 0x7f>, /* MPU private access */
+ <0x49032000 0x7f>; /* L3 Interconnect */
+ reg-names = "mpu", "dma";
+ interrupts = <0 112 0x4>;
+ interrupt-parent = <&gic>;
+ ti,hwmods = "mcpdm";
+ };
+
+ dmic: dmic@4012e000 {
+ compatible = "ti,omap4-dmic";
+ reg = <0x4012e000 0x7f>, /* MPU private access */
+ <0x4902e000 0x7f>; /* L3 Interconnect */
+ reg-names = "mpu", "dma";
+ interrupts = <0 114 0x4>;
+ interrupt-parent = <&gic>;
+ ti,hwmods = "dmic";
+ };
+
mcbsp1: mcbsp@40122000 {
compatible = "ti,omap4-mcbsp";
reg = <0x40122000 0xff>, /* MPU private access */