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authorHeiko Stuebner <heiko@sntech.de>2014-07-26 18:53:07 +0200
committerHeiko Stuebner <heiko@sntech.de>2014-07-26 23:19:50 +0200
commite40b43d6ea0c5c30ba3655b304d2d526539fc7ed (patch)
tree06a40ec80be79b6ab0a95de387d9495fe52a0cc5 /arch/arm/boot
parentARM: dts: rockchip: remove soc subnodes (diff)
downloadlinux-e40b43d6ea0c5c30ba3655b304d2d526539fc7ed.tar.xz
linux-e40b43d6ea0c5c30ba3655b304d2d526539fc7ed.zip
ARM: dts: rockchip: add handles for shared nodes that don't have one yet
Some nodes that are changed in the dtsi hierarchy do not have handles yet. As it was suggested in the rk3288 submission to do subsequent nodes changes through such handle-references, add the missing ones. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/rk3066a.dtsi2
-rw-r--r--arch/arm/boot/dts/rk3188.dtsi2
-rw-r--r--arch/arm/boot/dts/rk3xxx.dtsi8
3 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 4ad8f59503dd..ecf722ea5982 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -86,7 +86,7 @@
#reset-cells = <1>;
};
- pinctrl@20008000 {
+ pinctrl: pinctrl@20008000 {
compatible = "rockchip,rk3066a-pinctrl";
rockchip,grf = <&grf>;
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 038d9d45264c..7b631ec3102c 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -82,7 +82,7 @@
#reset-cells = <1>;
};
- pinctrl@20008000 {
+ pinctrl: pinctrl@20008000 {
compatible = "rockchip,rk3188-pinctrl";
rockchip,grf = <&grf>;
rockchip,pmu = <&pmu>;
diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi
index f70addd793a7..10e7586c1dc2 100644
--- a/arch/arm/boot/dts/rk3xxx.dtsi
+++ b/arch/arm/boot/dts/rk3xxx.dtsi
@@ -57,14 +57,14 @@
cache-level = <2>;
};
- global-timer@1013c200 {
+ global_timer: global-timer@1013c200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x1013c200 0x20>;
interrupts = <GIC_PPI 11 0x304>;
clocks = <&cru CORE_PERI>;
};
- local-timer@1013c600 {
+ local_timer: local-timer@1013c600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x1013c600 0x20>;
interrupts = <GIC_PPI 13 0x304>;
@@ -111,7 +111,7 @@
status = "disabled";
};
- dwmmc@10214000 {
+ mmc0: dwmmc@10214000 {
compatible = "rockchip,rk2928-dw-mshc";
reg = <0x10214000 0x1000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
@@ -124,7 +124,7 @@
status = "disabled";
};
- dwmmc@10218000 {
+ mmc1: dwmmc@10218000 {
compatible = "rockchip,rk2928-dw-mshc";
reg = <0x10218000 0x1000>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;