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authorSrinivas Kandagatla <srinivas.kandagatla@linaro.org>2015-07-27 15:52:19 +0200
committerAndy Gross <agross@codeaurora.org>2015-07-27 23:01:42 +0200
commit504155cafffbe35d5678c10af7777303ead01928 (patch)
tree1758b5b9a4989c0b98f0fa123630387f9d006896 /arch/arm/boot
parentARM: dts: apq8064: Add DT support for GSBI6 and for UART pin mux (diff)
downloadlinux-504155cafffbe35d5678c10af7777303ead01928.tar.xz
linux-504155cafffbe35d5678c10af7777303ead01928.zip
ARM: dts: apq8064: fix missing gsbi cell-index
Without this i2c instance for missing cell-index nodes would fail, fix it by adding correct cell-index. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/qcom-apq8064.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index e631b5822660..b9edc4e0de0b 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -249,6 +249,7 @@
gsbi3: gsbi@16200000 {
status = "disabled";
compatible = "qcom,gsbi-v1.0.0";
+ cell-index = <3>;
reg = <0x16200000 0x100>;
clocks = <&gcc GSBI3_H_CLK>;
clock-names = "iface";