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authorThierry Reding <treding@nvidia.com>2014-06-26 21:22:46 +0200
committerThierry Reding <treding@nvidia.com>2014-12-04 16:16:15 +0100
commit5b605d4426e1dc38b6572bd42c151ad247359e3a (patch)
treeb1b486c2b967e4d7468791fc0a75a7abf167d559 /arch/arm/boot
parentARM: tegra: Enable IOMMU for display controllers on Tegra114 (diff)
downloadlinux-5b605d4426e1dc38b6572bd42c151ad247359e3a.tar.xz
linux-5b605d4426e1dc38b6572bd42c151ad247359e3a.zip
ARM: tegra: Enable IOMMU for display controllers on Tegra124
Add iommus properties to the device tree nodes for the two display controllers found on Tegra124. This will allow the display controllers to map physically non-contiguous buffers to I/O virtual contiguous address spaces so that they can be used for scan-out. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/tegra124.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 5fcc6e704faa..a9f3a3e1afc4 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -1,5 +1,6 @@
#include <dt-bindings/clock/tegra124-car.h>
#include <dt-bindings/gpio/tegra-gpio.h>
+#include <dt-bindings/memory/tegra124-mc.h>
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -102,6 +103,8 @@
resets = <&tegra_car 27>;
reset-names = "dc";
+ iommus = <&mc TEGRA_SWGROUP_DC>;
+
nvidia,head = <0>;
};
@@ -115,6 +118,8 @@
resets = <&tegra_car 26>;
reset-names = "dc";
+ iommus = <&mc TEGRA_SWGROUP_DCB>;
+
nvidia,head = <1>;
};