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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2014-09-29 20:21:59 +0200
committerSimon Horman <horms+renesas@verge.net.au>2014-10-30 01:56:25 +0100
commit538c40e52df32285aa9440995c7345ea1c4d83b4 (patch)
tree332bf720ee4303878420008e253a5b6fc9cf7e2f /arch/arm/boot
parentARM: shmobile: henninger: enable USB PHY (diff)
downloadlinux-538c40e52df32285aa9440995c7345ea1c4d83b4.tar.xz
linux-538c40e52df32285aa9440995c7345ea1c4d83b4.zip
ARM: shmobile: r8a7790: link PCI USB devices to USB PHY
Describe the PCI USB devices that are behind the PCI bridges, adding necessary links to the USB PHY device. Based on the original work by Ben Dooks <ben.dooks@codethink.co.uk>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/r8a7790.dtsi28
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 12fb3fca2b9f..7b42b256fe59 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -1197,6 +1197,20 @@
interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb@0,1 {
+ reg = <0x800 0 0 0 0>;
+ device_type = "pci";
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
+
+ usb@0,2 {
+ reg = <0x1000 0 0 0 0>;
+ device_type = "pci";
+ phys = <&usb0 0>;
+ phy-names = "usb";
+ };
};
pci1: pci@ee0b0000 {
@@ -1237,6 +1251,20 @@
interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
+
+ usb@0,1 {
+ reg = <0x800 0 0 0 0>;
+ device_type = "pci";
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
+
+ usb@0,2 {
+ reg = <0x1000 0 0 0 0>;
+ device_type = "pci";
+ phys = <&usb2 0>;
+ phy-names = "usb";
+ };
};
pciec: pcie@fe000000 {