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authorOlof Johansson <olof@lixom.net>2019-06-25 13:52:17 +0200
committerOlof Johansson <olof@lixom.net>2019-06-25 13:52:17 +0200
commit09253fccca37137afec66ca5b9470cd566186af7 (patch)
tree43260da3329994216198aa9472fd8aed9a5f1208 /arch/arm/boot
parentMerge tag 'imx-dt-clkdep-5.3' of git://git.kernel.org/pub/scm/linux/kernel/gi... (diff)
parentARM: dts: imx7ulp-evk: enable USBOTG1 support (diff)
downloadlinux-09253fccca37137afec66ca5b9470cd566186af7.tar.xz
linux-09253fccca37137afec66ca5b9470cd566186af7.zip
Merge tag 'imx-dt-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm32 DT changes for 5.3: - New board support: iMX6-based Kontron SMARC-sAMX6i, i.MX7D based Meerkat96 board, and NXP LS1021A-TSN board. - A series from Andrey Smirnov to update vf610-zii-dev and imx7d-zii-rpu2 board, fixing UART2 pin assignment and stdout-path, adding QSPI device, and dropping unused pinmux. - Update imx6sl and imx6qdl device tree to assign corresponding clocks instead of dummy clock. - Update i.MX6/7 boards from NXP to assign corresponding power supply for LDOs. - Update i.MX6/7 device trees to enable SNVS poweroff key support according to board design. - Update coresight DT binding for i.MX7 according to consolidations for CoreSight replicator and funnel. - A series from Marek Vasut to update M53Menlo board on various devices like UART, USB, ethernet PHY, GPIOs etc. - Enable USBOTG support for imx7ulp and evk board. - A series from Peter Robinson to update imx6sx-udoo board, switching to SPDX License Identifier, enabling I2C devices and bluetooth support. - Add video capture support for i.MX53 and imx53-smd board. - Add PXP device for i.MX6UL. - Other random small updates on various boards. * tag 'imx-dt-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (46 commits) ARM: dts: imx7ulp-evk: enable USBOTG1 support ARM: dts: imx7ulp: add imx7ulp USBOTG1 support ARM: dts: imx6qdl-kontron-samx6i: add Kontron SMARC SoM Support ARM: dts: imx6qdl-kontron-samx6i: Add iMX6-based Kontron SMARC-sAMX6i module ARM: dts: imx7d-zii-rpu2: Drop unused pinmux entries ARM: dts: imx7d-zii-rpu2: Fix incorrrect 'stdout-path' ARM: dts: Add support for 96Boards Meerkat96 board ARM: dts: imx6ul: Add PXP node ARM: dts: imx6sll: Enable SNVS poweroff according to board design ARM: dts: imx7s: Enable SNVS power key according to board design ARM: dts: imx6sll: Enable SNVS power key according to board design ARM: dts: imx6ul: Enable SNVS power key according to board design ARM: dts: imx6sx: Enable SNVS power key according to board design ARM: dts: imx6qdl: Enable SNVS power key according to board design ARM: dts: imx53: Bind CPLD on M53Menlo ARM: dts: Introduce the NXP LS1021A-TSN board ARM: dts: imx6ull-colibri: enable UHS-I for USDHC1 ARM: dts: imx7d: Update cpufreq OPP table ARM: dts: imx6sx-udoo-neo: add bluetooth config to uart3 ARM: dts: imx6sx-udoo-neo: enable i2c-2 and i2c-4 for onboard sensors ... Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/Makefile2
-rw-r--r--arch/arm/boot/dts/imx53-m53menlo.dts266
-rw-r--r--arch/arm/boot/dts/imx53-smd.dts73
-rw-r--r--arch/arm/boot/dts/imx53.dtsi12
-rw-r--r--arch/arm/boot/dts/imx6dl-kontron-samx6i.dtsi12
-rw-r--r--arch/arm/boot/dts/imx6q-kontron-samx6i.dtsi36
-rw-r--r--arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi815
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabresd.dtsi16
-rw-r--r--arch/arm/boot/dts/imx6qdl.dtsi11
-rw-r--r--arch/arm/boot/dts/imx6sl-evk.dts12
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi12
-rw-r--r--arch/arm/boot/dts/imx6sll-evk.dts12
-rw-r--r--arch/arm/boot/dts/imx6sll.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6sx-sdb-reva.dts16
-rw-r--r--arch/arm/boot/dts/imx6sx-sdb.dts16
-rw-r--r--arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts39
-rw-r--r--arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts47
-rw-r--r--arch/arm/boot/dts/imx6sx-udoo-neo-full.dts47
-rw-r--r--arch/arm/boot/dts/imx6sx-udoo-neo.dtsi89
-rw-r--r--arch/arm/boot/dts/imx6sx.dtsi7
-rw-r--r--arch/arm/boot/dts/imx6ul-14x14-evk.dtsi4
-rw-r--r--arch/arm/boot/dts/imx6ul-geam.dts2
-rw-r--r--arch/arm/boot/dts/imx6ul-isiot.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6ul.dtsi14
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi11
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri.dtsi6
-rw-r--r--arch/arm/boot/dts/imx6ull.dtsi7
-rw-r--r--arch/arm/boot/dts/imx7d-meerkat96.dts375
-rw-r--r--arch/arm/boot/dts/imx7d-sdb.dts16
-rw-r--r--arch/arm/boot/dts/imx7d-zii-rpu2.dts16
-rw-r--r--arch/arm/boot/dts/imx7d.dtsi16
-rw-r--r--arch/arm/boot/dts/imx7s.dtsi11
-rw-r--r--arch/arm/boot/dts/imx7ulp-evk.dts55
-rw-r--r--arch/arm/boot/dts/imx7ulp.dtsi38
-rw-r--r--arch/arm/boot/dts/ls1021a-tsn.dts289
-rw-r--r--arch/arm/boot/dts/vf610-zii-dev.dtsi52
36 files changed, 2198 insertions, 258 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 3a5ef06bd5d3..9159fa2cea90 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -586,6 +586,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-colibri-emmc-eval-v3.dtb \
imx7d-colibri-eval-v3.dtb \
imx7d-mba7.dtb \
+ imx7d-meerkat96.dtb \
imx7d-nitrogen7.dtb \
imx7d-pico-hobbit.dtb \
imx7d-pico-pi.dtb \
@@ -602,6 +603,7 @@ dtb-$(CONFIG_SOC_IMX7ULP) += \
dtb-$(CONFIG_SOC_LS1021A) += \
ls1021a-moxa-uc-8410a.dtb \
ls1021a-qds.dtb \
+ ls1021a-tsn.dtb \
ls1021a-twr.dtb
dtb-$(CONFIG_SOC_VF610) += \
vf500-colibri-eval-v3.dtb \
diff --git a/arch/arm/boot/dts/imx53-m53menlo.dts b/arch/arm/boot/dts/imx53-m53menlo.dts
index f0a3fde0739c..10acc5331ba6 100644
--- a/arch/arm/boot/dts/imx53-m53menlo.dts
+++ b/arch/arm/boot/dts/imx53-m53menlo.dts
@@ -10,6 +10,25 @@
model = "MENLO M53 EMBEDDED DEVICE";
compatible = "menlo,m53menlo", "fsl,imx53";
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <&pinctrl_power_button>;
+ pinctrl-names = "default";
+
+ power-button {
+ label = "Power button";
+ gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_POWER>;
+ };
+ };
+
+ gpio-poweroff {
+ compatible = "gpio-poweroff";
+ pinctrl-0 = <&pinctrl_power_out>;
+ pinctrl-names = "default";
+ gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -30,7 +49,7 @@
eth {
label = "EthLedYe";
gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "none";
+ linux,default-trigger = "netdev";
};
};
@@ -45,12 +64,19 @@
};
};
+ beeper {
+ compatible = "gpio-beeper";
+ pinctrl-0 = <&pinctrl_beeper>;
+ gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>;
+ };
+
reg_usbh1_vbus: regulator-usbh1-vbus {
compatible = "regulator-fixed";
regulator-name = "vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
- gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
+ gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
};
};
@@ -74,6 +100,25 @@
assigned-clock-rates = <133333334>, <33333334>, <33333334>;
};
+&ecspi2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi2>;
+ cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>, <&gpio2 27 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+
+ spidev@0 {
+ compatible = "menlo,m53cpld";
+ spi-max-frequency = <25000000>;
+ reg = <0>;
+ };
+
+ spidev@1 {
+ compatible = "menlo,m53cpld";
+ spi-max-frequency = <25000000>;
+ reg = <1>;
+ };
+};
+
&esdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1>;
@@ -86,9 +131,82 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-mode = "rmii";
+ phy-reset-gpios = <&gpio7 7 GPIO_ACTIVE_LOW>;
status = "okay";
};
+&gpio1 {
+ gpio-line-names =
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "";
+};
+
+&gpio2 {
+ gpio-line-names =
+ "", "", "", "",
+ "", "", "", "",
+ "TestPin_SV2_3", "", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "";
+};
+
+&gpio3 {
+ gpio-line-names =
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "CPLD_JTAG_TDI", "CPLD_JTAG_TMS", "", "",
+ "", "CPLD_JTAG_TDO", "", "";
+};
+
+&gpio5 {
+ gpio-line-names =
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "CPLD_JTAG_TCK", "KBD_intK",
+ "CPLD_int", "CPLD_JTAG_internal", "CPLD_D[0]", "CPLD_D[1]",
+ "CPLD_D[2]", "CPLD_D[3]", "CPLD_D[4]", "CPLD_D[5]",
+ "CPLD_D[6]", "CPLD_D[7]", "DISP_reset", "KBD_intI";
+};
+
+&gpio6 {
+ gpio-line-names =
+ "", "", "", "",
+ "CPLD_reset", "", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "";
+};
+
+&gpio7 {
+ gpio-line-names =
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "", "USB-OTG_OverCurrent", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "", "", "", "";
+};
+
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
@@ -136,27 +254,37 @@
imx53-m53evk {
hoggrp {
fsl,pins = <
- MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x1c4
- MX53_PAD_EIM_EB3__GPIO2_31 0x1d5
- MX53_PAD_PATA_DA_0__GPIO7_6 0x1d5
- MX53_PAD_GPIO_19__CCM_CLKO 0x1d5
- MX53_PAD_CSI0_MCLK__CCM_CSI0_MCLK 0x1d5
- MX53_PAD_CSI0_DAT4__GPIO5_22 0x1d5
- MX53_PAD_CSI0_DAT5__GPIO5_23 0x1d5
- MX53_PAD_CSI0_DAT6__GPIO5_24 0x1d5
- MX53_PAD_CSI0_DAT7__GPIO5_25 0x1d5
- MX53_PAD_CSI0_DAT8__GPIO5_26 0x1d5
- MX53_PAD_CSI0_DAT9__GPIO5_27 0x1d5
- MX53_PAD_CSI0_DAT10__GPIO5_28 0x1d5
- MX53_PAD_CSI0_DAT11__GPIO5_29 0x1d5
- MX53_PAD_CSI0_DAT14__GPIO6_0 0x1d5
+ MX53_PAD_GPIO_19__CCM_CLKO 0x1e4
+ MX53_PAD_CSI0_DATA_EN__GPIO5_20 0x1e4
+ MX53_PAD_CSI0_DAT4__GPIO5_22 0x1e4
+ MX53_PAD_CSI0_DAT5__GPIO5_23 0x1c4
+ MX53_PAD_CSI0_DAT6__GPIO5_24 0x1e4
+ MX53_PAD_CSI0_DAT7__GPIO5_25 0x1e4
+ MX53_PAD_CSI0_DAT8__GPIO5_26 0x1e4
+ MX53_PAD_CSI0_DAT9__GPIO5_27 0x1c4
+ MX53_PAD_CSI0_DAT10__GPIO5_28 0x1e4
+ MX53_PAD_CSI0_DAT11__GPIO5_29 0x1e4
+ MX53_PAD_PATA_DATA11__GPIO2_11 0x1e4
+ MX53_PAD_EIM_D24__GPIO3_24 0x1e4
+ MX53_PAD_EIM_D25__GPIO3_25 0x1e4
+ MX53_PAD_EIM_D29__GPIO3_29 0x1e4
+ MX53_PAD_CSI0_PIXCLK__GPIO5_18 0x1e4
+ MX53_PAD_CSI0_VSYNC__GPIO5_21 0x1e4
+ MX53_PAD_CSI0_DAT18__GPIO6_4 0x1c4
+ MX53_PAD_PATA_DATA8__GPIO2_8 0x1e4
>;
};
pinctrl_led: ledgrp {
fsl,pins = <
- MX53_PAD_CSI0_DAT15__GPIO6_1 0x1d5
- MX53_PAD_CSI0_DAT16__GPIO6_2 0x1d5
+ MX53_PAD_CSI0_DAT15__GPIO6_1 0x1c4
+ MX53_PAD_CSI0_DAT16__GPIO6_2 0x1c4
+ >;
+ };
+
+ pinctrl_beeper: beepergrp {
+ fsl,pins = <
+ MX53_PAD_CSI0_DAT17__GPIO6_3 0x1c4
>;
};
@@ -169,49 +297,66 @@
pinctrl_can2: can2grp {
fsl,pins = <
- MX53_PAD_KEY_COL4__CAN2_TXCAN 0x1c4
+ MX53_PAD_KEY_COL4__CAN2_TXCAN 0x1e4
MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x1c4
>;
};
pinctrl_display_gpio: display-gpiogrp {
fsl,pins = <
- MX53_PAD_CSI0_DAT12__GPIO5_30 0x1d5 /* Reset */
- MX53_PAD_CSI0_DAT13__GPIO5_31 0x1d5 /* Interrupt */
+ MX53_PAD_CSI0_DAT12__GPIO5_30 0x1c4 /* Reset */
+ MX53_PAD_CSI0_MCLK__GPIO5_19 0x1e4 /* Int-K */
+ MX53_PAD_CSI0_DAT13__GPIO5_31 0x1c4 /* Int-I */
+
+ MX53_PAD_CSI0_DAT14__GPIO6_0 0x1c4 /* Power down */
>;
};
pinctrl_edt_ft5x06: edt-ft5x06grp {
fsl,pins = <
- MX53_PAD_PATA_DATA9__GPIO2_9 0x1d5 /* Reset */
- MX53_PAD_CSI0_DAT19__GPIO6_5 0x1d5 /* Interrupt */
- MX53_PAD_PATA_DATA10__GPIO2_10 0x1d5 /* Wake */
+ MX53_PAD_PATA_DATA9__GPIO2_9 0x1e4 /* Reset */
+ MX53_PAD_CSI0_DAT19__GPIO6_5 0x1c4 /* Interrupt */
+ MX53_PAD_PATA_DATA10__GPIO2_10 0x1e4 /* Wake */
+ >;
+ };
+
+ pinctrl_ecspi2: ecspi2grp {
+ fsl,pins = <
+ MX53_PAD_EIM_CS0__ECSPI2_SCLK 0xe4
+ MX53_PAD_EIM_OE__ECSPI2_MISO 0xe4
+ MX53_PAD_EIM_CS1__ECSPI2_MOSI 0xe4
+ MX53_PAD_EIM_RW__GPIO2_26 0xe4
+ MX53_PAD_EIM_LBA__GPIO2_27 0xe4
>;
};
pinctrl_esdhc1: esdhc1grp {
fsl,pins = <
- MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
- MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
- MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
- MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
- MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
- MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
+ MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1e4
+ MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1e4
+ MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1e4
+ MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1e4
+ MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1e4
+ MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1e4
+ MX53_PAD_GPIO_1__GPIO1_1 0x1c4
+ MX53_PAD_GPIO_9__GPIO1_9 0x1e4
>;
};
pinctrl_fec: fecgrp {
fsl,pins = <
- MX53_PAD_FEC_MDC__FEC_MDC 0x4
- MX53_PAD_FEC_MDIO__FEC_MDIO 0x1fc
- MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x180
- MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x180
- MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x180
- MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x180
- MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x180
- MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x4
- MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x4
- MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x4
+ MX53_PAD_FEC_MDC__FEC_MDC 0x1e4
+ MX53_PAD_FEC_MDIO__FEC_MDIO 0x1e4
+ MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x1e4
+ MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x1e4
+ MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x1e4
+ MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x1e4
+ MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x1e4
+ MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x1c4
+ MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x1e4
+ MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x1e4
+ MX53_PAD_PATA_DA_1__GPIO7_7 0x1e4
+ MX53_PAD_EIM_EB3__GPIO2_31 0x1e4
>;
};
@@ -240,10 +385,24 @@
>;
};
+ pinctrl_power_button: powerbutgrp {
+ fsl,pins = <
+ MX53_PAD_SD2_DATA2__GPIO1_13 0x1e4
+ >;
+ };
+
+ pinctrl_power_out: poweroutgrp {
+ fsl,pins = <
+ MX53_PAD_SD2_DATA0__GPIO1_15 0x1e4
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
+ MX53_PAD_PATA_IORDY__UART1_RTS 0x1e4
+ MX53_PAD_PATA_RESET_B__UART1_CTS 0x1e4
>;
};
@@ -251,13 +410,25 @@
fsl,pins = <
MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
+ MX53_PAD_PATA_DIOR__UART2_RTS 0x1e4
+ MX53_PAD_PATA_INTRQ__UART2_CTS 0x1e4
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
+ MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
+ MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
>;
};
pinctrl_usb: usbgrp {
fsl,pins = <
- MX53_PAD_GPIO_2__GPIO1_2 0x1d5
- MX53_PAD_GPIO_3__USBOH3_USBH1_OC 0x1d5
+ MX53_PAD_GPIO_2__GPIO1_2 0x1c4
+ MX53_PAD_GPIO_3__USBOH3_USBH1_OC 0x1c4
+ MX53_PAD_GPIO_4__GPIO1_4 0x1c4
+ MX53_PAD_GPIO_18__GPIO7_13 0x1c4
>;
};
};
@@ -287,12 +458,21 @@
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
+ uart-has-rtscts;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ linux,rs485-enabled-at-boot-time;
status = "okay";
};
@@ -301,7 +481,7 @@
pinctrl-0 = <&pinctrl_usb>;
vbus-supply = <&reg_usbh1_vbus>;
phy_type = "utmi";
- dr_mode = "peripheral";
+ dr_mode = "host";
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts
index 09071ca11c6c..ec9fb8940ffa 100644
--- a/arch/arm/boot/dts/imx53-smd.dts
+++ b/arch/arm/boot/dts/imx53-smd.dts
@@ -185,6 +185,31 @@
>;
};
+ pinctrl_ipu_csi0: ipucsi0grp {
+ fsl,pins = <
+ MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12 0x1c4
+ MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13 0x1c4
+ MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14 0x1c4
+ MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15 0x1c4
+ MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16 0x1c4
+ MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17 0x1c4
+ MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18 0x1c4
+ MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19 0x1c4
+ MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK 0x1e4
+ MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC 0x1e4
+ MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC 0x1e4
+ MX53_PAD_CSI0_DATA_EN__IPU_CSI0_DATA_EN 0x1e4
+ >;
+ };
+
+ pinctrl_ov5642: ov5642grp {
+ fsl,pins = <
+ MX53_PAD_NANDF_WP_B__GPIO6_9 0x1e4
+ MX53_PAD_NANDF_RB0__GPIO6_10 0x1e4
+ MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x1c4
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1e4
@@ -256,11 +281,47 @@
camera: ov5642@3c {
compatible = "ovti,ov5642";
reg = <0x3c>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ov5642>;
+ assigned-clocks = <&clks IMX5_CLK_SSI_EXT1_SEL>,
+ <&clks IMX5_CLK_SSI_EXT1_COM_SEL>;
+ assigned-clock-parents = <&clks IMX5_CLK_PLL2_SW>,
+ <&clks IMX5_CLK_SSI_EXT1_PODF>;
+ assigned-clock-rates = <0>, <24000000>;
+ clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>;
+ clock-names = "xclk";
+ DVDD-supply = <&ldo9_reg>;
+ AVDD-supply = <&ldo7_reg>;
+ reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>;
+ powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_HIGH>;
+
+ port {
+ ov5642_to_ipu_csi0: endpoint {
+ remote-endpoint = <&ipu_csi0_from_parallel_sensor>;
+ bus-width = <8>;
+ hsync-active = <1>;
+ vsync-active = <1>;
+ };
+ };
};
pmic: dialog@48 {
compatible = "dlg,da9053", "dlg,da9052";
reg = <0x48>;
+ interrupt-parent = <&gpio7>;
+ interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+
+ regulators {
+ ldo7_reg: ldo7 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3600000>;
+ };
+
+ ldo9_reg: ldo9 {
+ regulator-min-microvolt = <1250000>;
+ regulator-max-microvolt = <3650000>;
+ };
+ };
};
};
@@ -271,3 +332,15 @@
phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
status = "okay";
};
+
+&ipu_csi0_from_parallel_sensor {
+ remote-endpoint = <&ov5642_to_ipu_csi0>;
+ data-shift = <12>; /* Lines 19:12 used */
+ hsync-active = <1>;
+ vsync-active = <1>;
+};
+
+&ipu_csi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ipu_csi0>;
+};
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 9b672ed2486d..ed341cfd9d09 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -31,6 +31,7 @@
i2c0 = &i2c1;
i2c1 = &i2c2;
i2c2 = &i2c3;
+ ipu0 = &ipu;
mmc0 = &esdhc1;
mmc1 = &esdhc2;
mmc2 = &esdhc3;
@@ -71,6 +72,11 @@
ports = <&ipu_di0>, <&ipu_di1>;
};
+ capture_subsystem {
+ compatible = "fsl,imx-capture-subsystem";
+ ports = <&ipu_csi0>, <&ipu_csi1>;
+ };
+
tzic: tz-interrupt-controller@fffc000 {
compatible = "fsl,imx53-tzic", "fsl,tzic";
interrupt-controller;
@@ -158,10 +164,16 @@
ipu_csi0: port@0 {
reg = <0>;
+
+ ipu_csi0_from_parallel_sensor: endpoint {
+ };
};
ipu_csi1: port@1 {
reg = <1>;
+
+ ipu_csi1_from_parallel_sensor: endpoint {
+ };
};
ipu_di0: port@2 {
diff --git a/arch/arm/boot/dts/imx6dl-kontron-samx6i.dtsi b/arch/arm/boot/dts/imx6dl-kontron-samx6i.dtsi
new file mode 100644
index 000000000000..a864fdbd5f16
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-kontron-samx6i.dtsi
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0 OR X11
+/*
+ * Copyright 2019 (C) Pengutronix, Marco Felsch <kernel@pengutronix.de>
+ */
+
+#include "imx6dl.dtsi"
+#include "imx6qdl-kontron-samx6i.dtsi"
+
+/ {
+ model = "Kontron SMARC sAMX6i Dual-Lite/Solo";
+ compatible = "kontron,imx6dl-samx6i", "fsl,imx6dl";
+};
diff --git a/arch/arm/boot/dts/imx6q-kontron-samx6i.dtsi b/arch/arm/boot/dts/imx6q-kontron-samx6i.dtsi
new file mode 100644
index 000000000000..2618eccfe50d
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-kontron-samx6i.dtsi
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0 OR X11
+/*
+ * Copyright 2019 (C) Pengutronix, Marco Felsch <kernel@pengutronix.de>
+ */
+
+#include "imx6q.dtsi"
+#include "imx6qdl-kontron-samx6i.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Kontron SMARC sAMX6i Quad/Dual";
+ compatible = "kontron,imx6q-samx6i", "fsl,imx6q";
+};
+
+/* Quad/Dual SoMs have 3 chip-select signals */
+&ecspi4 {
+ fsl,spi-num-chipselects = <3>;
+ cs-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>,
+ <&gpio3 29 GPIO_ACTIVE_HIGH>,
+ <&gpio3 25 GPIO_ACTIVE_HIGH>;
+};
+
+&pinctrl_ecspi4 {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
+ MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
+ MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
+
+ /* SPI4_IMX_CS2# - connected to internal flash */
+ MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x1b0b0
+ /* SPI4_IMX_CS0# - connected to SMARC SPI0_CS0# */
+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
+ /* SPI4_CS3# - connected to SMARC SPI0_CS1# */
+ MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x1b0b0
+ >;
+};
diff --git a/arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi b/arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi
new file mode 100644
index 000000000000..81c7ebb4b3fb
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi
@@ -0,0 +1,815 @@
+// SPDX-License-Identifier: GPL-2.0 OR X11
+/*
+ * Copyright 2017 (C) Priit Laes <plaes@plaes.org>
+ * Copyright 2018 (C) Pengutronix, Michael Grzeschik <mgr@pengutronix.de>
+ * Copyright 2019 (C) Pengutronix, Marco Felsch <kernel@pengutronix.de>
+ *
+ * Based on initial work by Nikita Yushchenko <nyushchenko at dev.rtsoft.ru>
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/sound/fsl-imx-audmux.h>
+
+/ {
+ reg_1p0v_s0: regulator-1p0v-s0 {
+ compatible = "regulator-fixed";
+ regulator-name = "V_1V0_S0";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&reg_smarc_suppy>;
+ };
+
+ reg_1p35v_vcoredig_s5: regulator-1p35v-vcoredig-s5 {
+ compatible = "regulator-fixed";
+ regulator-name = "V_1V35_VCOREDIG_S5";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&reg_3p3v_s5>;
+ };
+
+ reg_1p8v_s5: regulator-1p8v-s5 {
+ compatible = "regulator-fixed";
+ regulator-name = "V_1V8_S5";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&reg_3p3v_s5>;
+ };
+
+ reg_3p3v_s0: regulator-3p3v-s0 {
+ compatible = "regulator-fixed";
+ regulator-name = "V_3V3_S0";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&reg_3p3v_s5>;
+ };
+
+ reg_3p3v_s0: regulator-3p3v-s0 {
+ compatible = "regulator-fixed";
+ regulator-name = "V_3V3_S0";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&reg_3p3v_s5>;
+ };
+
+ reg_3p3v_s5: regulator-3p3v-s5 {
+ compatible = "regulator-fixed";
+ regulator-name = "V_3V3_S5";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&reg_smarc_suppy>;
+ };
+
+ reg_smarc_lcdbklt: regulator-smarc-lcdbklt {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lcdbklt_en>;
+ regulator-name = "LCD_BKLT_EN";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ gpio = <&gpio1 16 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_smarc_lcdvdd: regulator-smarc-lcdvdd {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lcdvdd_en>;
+ regulator-name = "LCD_VDD_EN";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_smarc_rtc: regulator-smarc-rtc {
+ compatible = "regulator-fixed";
+ regulator-name = "V_IN_RTC_BATT";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ /* Module supply range can be 3.00V ... 5.25V */
+ reg_smarc_suppy: regulator-smarc-supply {
+ compatible = "regulator-fixed";
+ regulator-name = "V_IN_WIDE";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ lcd: lcd {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx-parallel-display";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lcd>;
+ status = "disabled";
+
+ port@0 {
+ reg = <0>;
+
+ lcd_in: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ lcd_out: endpoint {
+ };
+ };
+ };
+
+ lcd_backlight: lcd-backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm4 0 5000000>;
+ pwm-names = "LCD_BKLT_PWM";
+
+ brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
+ default-brightness-level = <4>;
+
+ power-supply = <&reg_smarc_lcdbklt>;
+ status = "disabled";
+ };
+
+ i2c_intern: i2c-gpio-intern {
+ compatible = "i2c-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c_gpio_intern>;
+ sda-gpios = <&gpio1 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ i2c-gpio,delay-us = <2>; /* ~100 kHz */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c_lcd: i2c-gpio-lcd {
+ compatible = "i2c-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c_gpio_lcd>;
+ sda-gpios = <&gpio1 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&gpio1 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ i2c-gpio,delay-us = <2>; /* ~100 kHz */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabld";
+ };
+
+ i2c_cam: i2c-gpio-cam {
+ compatible = "i2c-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c_gpio_cam>;
+ sda-gpios = <&gpio4 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ i2c-gpio,delay-us = <2>; /* ~100 kHz */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabld";
+ };
+};
+
+/* I2S0, I2S1 */
+&audmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_audmux>;
+
+ audmux_ssi1 {
+ fsl,audmux-port = <MX51_AUDMUX_PORT1_SSI0>;
+ fsl,port-config = <
+ (IMX_AUDMUX_V2_PTCR_TFSEL(MX51_AUDMUX_PORT3) |
+ IMX_AUDMUX_V2_PTCR_TCSEL(MX51_AUDMUX_PORT3) |
+ IMX_AUDMUX_V2_PTCR_SYN |
+ IMX_AUDMUX_V2_PTCR_TFSDIR |
+ IMX_AUDMUX_V2_PTCR_TCLKDIR)
+ IMX_AUDMUX_V2_PDCR_RXDSEL(MX51_AUDMUX_PORT3)
+ >;
+ };
+
+ audmux_adu3 {
+ fsl,audmux-port = <MX51_AUDMUX_PORT3>;
+ fsl,port-config = <
+ IMX_AUDMUX_V2_PTCR_SYN
+ IMX_AUDMUX_V2_PDCR_RXDSEL(MX51_AUDMUX_PORT1_SSI0)
+ >;
+ };
+
+ audmux_ssi2 {
+ fsl,audmux-port = <MX51_AUDMUX_PORT2_SSI1>;
+ fsl,port-config = <
+ (IMX_AUDMUX_V2_PTCR_TFSEL(MX51_AUDMUX_PORT4) |
+ IMX_AUDMUX_V2_PTCR_TCSEL(MX51_AUDMUX_PORT4) |
+ IMX_AUDMUX_V2_PTCR_SYN |
+ IMX_AUDMUX_V2_PTCR_TFSDIR |
+ IMX_AUDMUX_V2_PTCR_TCLKDIR)
+ IMX_AUDMUX_V2_PDCR_RXDSEL(MX51_AUDMUX_PORT4)
+ >;
+ };
+
+ audmux_adu4 {
+ fsl,audmux-port = <MX51_AUDMUX_PORT4>;
+ fsl,port-config = <
+ IMX_AUDMUX_V2_PTCR_SYN
+ IMX_AUDMUX_V2_PDCR_RXDSEL(MX51_AUDMUX_PORT2_SSI1)
+ >;
+ };
+};
+
+/* CAN0 */
+&can1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan1>;
+};
+
+/* CAN1 */
+&can2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan2>;
+};
+
+/* SPI1 */
+&ecspi2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi2>;
+ cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>,
+ <&gpio2 27 GPIO_ACTIVE_HIGH>;
+};
+
+/* SPI0 */
+&ecspi4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi4>;
+ cs-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>,
+ <&gpio3 29 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+
+ /* default boot source: workaround #1 for errata ERR006282 */
+ smarc_flash: spi-flash@0 {
+ compatible = "winbond,w25q16dw", "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ };
+};
+
+/* GBE */
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet>;
+ phy-mode = "rgmii";
+ phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
+};
+
+&i2c_intern {
+ pmic@8 {
+ compatible = "fsl,pfuze100";
+ reg = <0x08>;
+
+ regulators {
+ reg_v_core_s0: sw1ab {
+ regulator-name = "V_CORE_S0";
+ regulator-min-microvolt = <300000>;
+ regulator-max-microvolt = <1875000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_vddsoc_s0: sw1c {
+ regulator-name = "V_VDDSOC_S0";
+ regulator-min-microvolt = <300000>;
+ regulator-max-microvolt = <1875000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p15v_s0: sw2 {
+ regulator-name = "V_3V15_S0";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ /* sw3a/b is used in dual mode, but driver does not
+ * support it. Although, there's no need to control
+ * DDR power - so just leaving dummy entries for sw3a
+ * and sw3b for now.
+ */
+ sw3a {
+ regulator-min-microvolt = <400000>;
+ regulator-max-microvolt = <1975000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ sw3b {
+ regulator-min-microvolt = <400000>;
+ regulator-max-microvolt = <1975000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_1p8v_s0: sw4 {
+ regulator-name = "V_1V8_S0";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ /* Regulator for USB */
+ reg_5p0v_s0: swbst {
+ regulator-name = "V_5V0_S0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5150000>;
+ regulator-boot-on;
+ };
+
+ reg_vsnvs: vsnvs {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_vrefddr: vrefddr {
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ /*
+ * Per schematics, of all VGEN's, only VGEN5 has some
+ * usage ... but even that - over DNI resistor
+ */
+ vgen1 {
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1550000>;
+ };
+
+ vgen2 {
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1550000>;
+ };
+
+ vgen3 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vgen4 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_2p5v_s0: vgen5 {
+ regulator-name = "V_2V5_S0";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vgen6 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ };
+ };
+ };
+};
+
+/* I2C_GP */
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+};
+
+/* HDMI_CTRL */
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+};
+
+/* I2C_PM */
+&i2c3 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "okay";
+
+ smarc_eeprom: eeprom@50 {
+ compatible = "atmel,24c32";
+ reg = <0x50>;
+ pagesize = <32>;
+ };
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mgmt_gpios &pinctrl_gpio>;
+
+ pinctrl_audmux: audmuxgrp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
+ MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x130b0
+ MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
+ MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
+
+ MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
+ MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0
+ MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
+ MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
+
+ /* AUDIO MCLK */
+ MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x000b0
+ >;
+ };
+
+ pinctrl_ecspi2: ecspi2grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
+ MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
+ MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
+
+ MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x1b0b0 /* CS0 */
+ MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b0b0 /* CS1 */
+ >;
+ };
+
+ pinctrl_ecspi4: ecspi4grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
+ MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
+ MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
+
+ /* SPI_IMX_CS2# - connected to internal flash */
+ MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x1b0b0
+ /* SPI_IMX_CS0# - connected to SMARC SPI0_CS0# */
+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
+ >;
+ };
+
+ pinctrl_flexcan1: flexcan1grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
+ MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
+ >;
+ };
+
+ pinctrl_flexcan2: flexcan2grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
+ MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
+ >;
+ };
+
+ pinctrl_gpio: gpiogrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x1b0b0 /* GPIO0 / CAM0_PWR# */
+ MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x1b0b0 /* GPIO1 / CAM1_PWR# */
+ MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x1b0b0 /* GPIO2 / CAM0_RST# */
+ MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x1b0b0 /* GPIO3 / CAM1_RST# */
+ MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x1b0b0 /* GPIO4 / HDA_RST# */
+ MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x1b0b0 /* GPIO5 / PWM_OUT */
+ MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x1b0b0 /* GPIO6 / TACHIN */
+ MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x1b0b0 /* GPIO7 / PCAM_FLD */
+ MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x1b0b0 /* GPIO8 / CAN0_ERR# */
+ MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x1b0b0 /* GPIO9 / CAN1_ERR# */
+ MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x1b0b0 /* GPIO10 */
+ MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x1b0b0 /* GPIO11 */
+ >;
+ };
+
+ pinctrl_enet: enetgrp {
+ fsl,pins = <
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+ MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 /* RST_GBE0_PHY# */
+ >;
+ };
+
+ pinctrl_i2c_gpio_cam: i2c-gpiocamgrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0 /* SCL */
+ MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 /* SDA */
+ >;
+ };
+
+ pinctrl_i2c_gpio_intern: i2c-gpiointerngrp {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 /* SCL */
+ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* SDA */
+ >;
+ };
+
+ pinctrl_i2c_gpio_lcd: i2c-gpiolcdgrp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x1b0b0 /* SCL */
+ MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x1b0b0 /* SDA */
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_lcd: lcdgrp {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x100f1
+ MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x100f1
+ MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x100f1
+ MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x100f1
+ MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x100f1
+ MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x100f1
+ MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x100f1
+ MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x100f1
+ MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x100f1
+ MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x100f1
+ MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x100f1
+ MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x100f1
+ MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x100f1
+ MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x100f1
+ MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x100f1
+ MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x100f1
+ MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x100f1
+ MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x100f1
+ MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x100f1
+ MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x100f1
+ MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x100f1
+ MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x100f1
+ MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x100f1
+ MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x100f1
+
+ MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x100f1
+ MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x100f1 /* DE */
+ MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x100f1 /* HSYNC */
+ MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x100f1 /* VSYNC */
+ >;
+ };
+
+ pinctrl_lcdbklt_en: lcdbkltengrp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b1
+ >;
+ };
+
+ pinctrl_lcdvdd_en: lcdvddengrp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0
+ >;
+ };
+
+ pinctrl_mipi_csi: mipi-csigrp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x000b0 /* CSI0/1 MCLK */
+ >;
+ };
+
+ pinctrl_mgmt_gpios: mgmt-gpiosgrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x1b0b0 /* LID# */
+ MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x1b0b0 /* SLEEP# */
+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 /* CHARGING# */
+ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* CHARGER_PRSNT# */
+ MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x1b0b0 /* CARRIER_STBY# */
+ MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b0b0 /* BATLOW# */
+ MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1b0b0 /* TEST# */
+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 /* VDD_IO_SEL_D# */
+ MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0 /* POWER_BTN# */
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x1b0b0 /* PCI_A_PRSNT# */
+ MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x1b0b0 /* RST_PCIE_A# */
+ MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b0 /* PCIE_WAKE# */
+ >;
+ };
+
+ pinctrl_pwm4: pwm4grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
+ MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
+ MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1
+ MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
+ MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart4: uart4grp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
+ MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
+ MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart5: uart5grp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1
+ MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_usbotg: usbotggrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x1f8b0
+ /* power, oc muxed but not used by the driver */
+ MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0 /* USB power */
+ MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b0b0 /* USB OC */
+ >;
+ };
+
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x17059
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
+
+ MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0 /* CD */
+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b0 /* WP */
+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PWR_EN */
+ >;
+ };
+
+ pinctrl_usdhc4: usdhc4grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x17059
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
+ >;
+ };
+
+ pinctrl_wdog1: wdog1rp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_9__WDOG1_B 0x1b0b0
+ >;
+ };
+};
+
+&mipi_csi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mipi_csi>;
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ wake-up-gpio = <&gpio6 18 GPIO_ACTIVE_HIGH>;
+ reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
+};
+
+/* LCD_BKLT_PWM */
+&pwm4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm4>;
+};
+
+&reg_arm {
+ vin-supply = <&reg_v_core_s0>;
+};
+
+&reg_pu {
+ vin-supply = <&reg_vddsoc_s0>;
+};
+
+&reg_soc {
+ vin-supply = <&reg_vddsoc_s0>;
+};
+
+/* SER0 */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ uart-has-rtscts;
+};
+
+/* SER1 */
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+};
+
+/* SER2 */
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ uart-has-rtscts;
+};
+
+/* SER3 */
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart5>;
+};
+
+/* USB0 */
+&usbotg {
+ /*
+ * no 'imx6-usb-charger-detection'
+ * since USB_OTG_CHD_B pin is not wired
+ */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg>;
+};
+
+/* USB1/2 via hub */
+&usbh1 {
+ vbus-supply = <&reg_5p0v_s0>;
+};
+
+/* SDIO */
+&usdhc3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
+ no-1-8-v;
+};
+
+/* SDMMC */
+&usdhc4 {
+ /* Internal eMMC, optional on some boards */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc4>;
+ bus-width = <8>;
+ no-sdio;
+ no-sd;
+ non-removable;
+ vmmc-supply = <&reg_3p3v_s0>;
+ vqmmc-supply = <&reg_1p8v_s0>;
+};
+
+&wdog1 {
+ /* CPLD is feeded by watchdog (hardwired) */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wdog1>;
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index 185fb17a3500..71ca76a5e4a5 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -745,10 +745,26 @@
vin-supply = <&sw1c_reg>;
};
+&reg_vdd1p1 {
+ vin-supply = <&vgen5_reg>;
+};
+
+&reg_vdd3p0 {
+ vin-supply = <&sw2_reg>;
+};
+
+&reg_vdd2p5 {
+ vin-supply = <&vgen5_reg>;
+};
+
&snvs_poweroff {
status = "okay";
};
+&snvs_pwrkey {
+ status = "okay";
+};
+
&ssi2 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index b3a77bcf00d5..4b801935cad1 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -675,14 +675,14 @@
compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
reg = <0x020bc000 0x4000>;
interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6QDL_CLK_DUMMY>;
+ clocks = <&clks IMX6QDL_CLK_IPG>;
};
wdog2: wdog@20c0000 {
compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
reg = <0x020c0000 0x4000>;
interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6QDL_CLK_DUMMY>;
+ clocks = <&clks IMX6QDL_CLK_IPG>;
status = "disabled";
};
@@ -701,7 +701,7 @@
<0 54 IRQ_TYPE_LEVEL_HIGH>,
<0 127 IRQ_TYPE_LEVEL_HIGH>;
- regulator-1p1 {
+ reg_vdd1p1: regulator-1p1 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd1p1";
regulator-min-microvolt = <1000000>;
@@ -716,7 +716,7 @@
anatop-enable-bit = <0>;
};
- regulator-3p0 {
+ reg_vdd3p0: regulator-3p0 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd3p0";
regulator-min-microvolt = <2800000>;
@@ -731,7 +731,7 @@
anatop-enable-bit = <0>;
};
- regulator-2p5 {
+ reg_vdd2p5: regulator-2p5 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd2p5";
regulator-min-microvolt = <2250000>;
@@ -841,6 +841,7 @@
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
linux,keycode = <KEY_POWER>;
wakeup-source;
+ status = "disabled";
};
snvs_lpgpr: snvs-lpgpr {
diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
index f7a48e4622e1..4829aa682aeb 100644
--- a/arch/arm/boot/dts/imx6sl-evk.dts
+++ b/arch/arm/boot/dts/imx6sl-evk.dts
@@ -580,6 +580,18 @@
status = "okay";
};
+&reg_vdd1p1 {
+ vin-supply = <&sw2_reg>;
+};
+
+&reg_vdd3p0 {
+ vin-supply = <&sw2_reg>;
+};
+
+&reg_vdd2p5 {
+ vin-supply = <&sw2_reg>;
+};
+
&snvs_poweroff {
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 9ddbeea64b72..b36fc012ff06 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -495,7 +495,7 @@
compatible = "fsl,imx6sl-kpp", "fsl,imx21-kpp";
reg = <0x020b8000 0x4000>;
interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_DUMMY>;
+ clocks = <&clks IMX6SL_CLK_IPG>;
status = "disabled";
};
@@ -503,14 +503,14 @@
compatible = "fsl,imx6sl-wdt", "fsl,imx21-wdt";
reg = <0x020bc000 0x4000>;
interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_DUMMY>;
+ clocks = <&clks IMX6SL_CLK_IPG>;
};
wdog2: wdog@20c0000 {
compatible = "fsl,imx6sl-wdt", "fsl,imx21-wdt";
reg = <0x020c0000 0x4000>;
interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_DUMMY>;
+ clocks = <&clks IMX6SL_CLK_IPG>;
status = "disabled";
};
@@ -531,7 +531,7 @@
<0 54 IRQ_TYPE_LEVEL_HIGH>,
<0 127 IRQ_TYPE_LEVEL_HIGH>;
- regulator-1p1 {
+ reg_vdd1p1: regulator-1p1 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd1p1";
regulator-min-microvolt = <1000000>;
@@ -546,7 +546,7 @@
anatop-enable-bit = <0>;
};
- regulator-3p0 {
+ reg_vdd3p0: regulator-3p0 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd3p0";
regulator-min-microvolt = <2800000>;
@@ -561,7 +561,7 @@
anatop-enable-bit = <0>;
};
- regulator-2p5 {
+ reg_vdd2p5: regulator-2p5 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd2p5";
regulator-min-microvolt = <2250000>;
diff --git a/arch/arm/boot/dts/imx6sll-evk.dts b/arch/arm/boot/dts/imx6sll-evk.dts
index 4a31a415f88e..3e1d32fdf4b8 100644
--- a/arch/arm/boot/dts/imx6sll-evk.dts
+++ b/arch/arm/boot/dts/imx6sll-evk.dts
@@ -265,6 +265,18 @@
status = "okay";
};
+&reg_3p0 {
+ vin-supply = <&sw2_reg>;
+};
+
+&snvs_poweroff {
+ status = "okay";
+};
+
+&snvs_pwrkey {
+ status = "okay";
+};
+
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi
index 1b4899f0fcde..b0a77ff70b67 100644
--- a/arch/arm/boot/dts/imx6sll.dtsi
+++ b/arch/arm/boot/dts/imx6sll.dtsi
@@ -568,6 +568,7 @@
regmap = <&snvs>;
offset = <0x38>;
mask = <0x61>;
+ status = "disabled";
};
snvs_pwrkey: snvs-powerkey {
@@ -576,6 +577,7 @@
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
linux,keycode = <KEY_POWER>;
wakeup-source;
+ status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/imx6sx-sdb-reva.dts b/arch/arm/boot/dts/imx6sx-sdb-reva.dts
index 00c485482301..f1830ed387a5 100644
--- a/arch/arm/boot/dts/imx6sx-sdb-reva.dts
+++ b/arch/arm/boot/dts/imx6sx-sdb-reva.dts
@@ -154,3 +154,19 @@
enable-active-high;
vin-supply = <&reg_can_en>;
};
+
+&reg_vdd1p1 {
+ vin-supply = <&vgen6_reg>;
+};
+
+&reg_vdd3p0 {
+ vin-supply = <&sw2_reg>;
+};
+
+&reg_vdd2p5 {
+ vin-supply = <&vgen6_reg>;
+};
+
+&snvs_pwrkey {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dts b/arch/arm/boot/dts/imx6sx-sdb.dts
index 998e3e13a005..a8ee7087af5a 100644
--- a/arch/arm/boot/dts/imx6sx-sdb.dts
+++ b/arch/arm/boot/dts/imx6sx-sdb.dts
@@ -137,7 +137,23 @@
vin-supply = <&sw1a_reg>;
};
+&reg_vdd1p1 {
+ vin-supply = <&vgen6_reg>;
+};
+
+&reg_vdd3p0 {
+ vin-supply = <&sw2_reg>;
+};
+
+&reg_vdd2p5 {
+ vin-supply = <&vgen6_reg>;
+};
+
&reg_can_stby {
/* Transceiver EN/STBY is active low on RevB board */
gpio = <&gpio4 27 GPIO_ACTIVE_LOW>;
};
+
+&snvs_pwrkey {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts b/arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts
index db0feb9b9f5d..205ea26484e3 100644
--- a/arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts
+++ b/arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts
@@ -1,43 +1,6 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 Andreas Färber
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- * a) This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- * b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts b/arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts
index 5c7a2bb9141c..5817b4985391 100644
--- a/arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts
+++ b/arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts
@@ -1,43 +1,6 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 Andreas Färber
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- * a) This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- * b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
@@ -53,3 +16,11 @@
reg = <0x80000000 0x40000000>;
};
};
+
+&i2c4 { /* Onboard Motion sensors */
+ status = "okay";
+};
+
+&uart3 { /* Bluetooth */
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo-full.dts b/arch/arm/boot/dts/imx6sx-udoo-neo-full.dts
index 13dfe2afaba5..96f4d89848a3 100644
--- a/arch/arm/boot/dts/imx6sx-udoo-neo-full.dts
+++ b/arch/arm/boot/dts/imx6sx-udoo-neo-full.dts
@@ -1,43 +1,6 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 Andreas Färber
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- * a) This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- * b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
@@ -68,3 +31,11 @@
};
};
};
+
+&i2c4 { /* Onboard Motion sensors */
+ status = "okay";
+};
+
+&uart3 { /* Bluetooth */
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi b/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi
index 53b3eac94f0d..25d4aa985a69 100644
--- a/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi
+++ b/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi
@@ -1,43 +1,6 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 Andreas Färber
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- * a) This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- * b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
*/
#include "imx6sx.dtsi"
@@ -107,18 +70,6 @@
startup-delay-us = <70000>;
enable-active-high;
};
-
- reg_bt: regulator-bt {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_bt_reg>;
- enable-active-high;
- gpio = <&gpio2 17 GPIO_ACTIVE_HIGH>;
- regulator-name = "bt_reg";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- };
};
&fec1 {
@@ -225,6 +176,20 @@
};
};
+&i2c2 { /* Brick snap in sensors connector */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ clock-frequency = <100000>;
+ status = "okay";
+};
+
+&i2c4 { /* Onboard Motion sensors */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c4>;
+ clock-frequency = <100000>;
+ status = "disabled";
+};
+
&iomuxc {
pinctrl_bt_reg: btreggrp {
fsl,pins =
@@ -256,6 +221,18 @@
<MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x4001b8b1>;
};
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins =
+ <MX6SX_PAD_GPIO1_IO03__I2C2_SDA 0x4001b8b1>,
+ <MX6SX_PAD_GPIO1_IO02__I2C2_SCL 0x4001b8b1>;
+ };
+
+ pinctrl_i2c4: i2c4grp {
+ fsl,pins =
+ <MX6SX_PAD_USB_H_DATA__I2C4_SDA 0x4001b8b1>,
+ <MX6SX_PAD_USB_H_STROBE__I2C4_SCL 0x4001b8b1>;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins =
<MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1>,
@@ -354,11 +331,19 @@
status = "disabled";
};
-&uart3 { /* Bluetooth */
+&uart3 { /* Bluetooth - only on Extended/Full versions */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
uart-has-rtscts;
- status = "okay";
+ status = "disabled";
+
+ bluetooth {
+ compatible = "ti,wl1831-st";
+ enable-gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_bt_reg>;
+ max-speed = <921600>;
+ };
};
/* Arduino serial */
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index b16a123990a2..bb25add90f19 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -600,7 +600,7 @@
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
- regulator-1p1 {
+ reg_vdd1p1: regulator-1p1 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd1p1";
regulator-min-microvolt = <1000000>;
@@ -615,7 +615,7 @@
anatop-enable-bit = <0>;
};
- regulator-3p0 {
+ reg_vdd3p0: regulator-3p0 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd3p0";
regulator-min-microvolt = <2800000>;
@@ -630,7 +630,7 @@
anatop-enable-bit = <0>;
};
- regulator-2p5 {
+ reg_vdd2p5: regulator-2p5 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd2p5";
regulator-min-microvolt = <2250000>;
@@ -738,6 +738,7 @@
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
linux,keycode = <KEY_POWER>;
wakeup-source;
+ status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi b/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
index 9207d5d071f1..cbe61b61a212 100644
--- a/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
+++ b/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
@@ -238,6 +238,10 @@
status = "okay";
};
+&snvs_pwrkey {
+ status = "okay";
+};
+
&tsc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tsc>;
diff --git a/arch/arm/boot/dts/imx6ul-geam.dts b/arch/arm/boot/dts/imx6ul-geam.dts
index bc77f26a2f1d..21ddd359d3ed 100644
--- a/arch/arm/boot/dts/imx6ul-geam.dts
+++ b/arch/arm/boot/dts/imx6ul-geam.dts
@@ -169,7 +169,7 @@
display = <&display0>;
status = "okay";
- display0: display {
+ display0: display0 {
bits-per-pixel = <16>;
bus-width = <18>;
diff --git a/arch/arm/boot/dts/imx6ul-isiot.dtsi b/arch/arm/boot/dts/imx6ul-isiot.dtsi
index 213e802bf35c..b26d4f57c655 100644
--- a/arch/arm/boot/dts/imx6ul-isiot.dtsi
+++ b/arch/arm/boot/dts/imx6ul-isiot.dtsi
@@ -161,7 +161,7 @@
display = <&display0>;
status = "okay";
- display0: display {
+ display0: display0 {
bits-per-pixel = <16>;
bus-width = <18>;
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index bbf010c73336..426efbc78b80 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -59,6 +59,7 @@
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0>;
+ clock-frequency = <696000000>;
clock-latency = <61036>; /* two CLK32 periods */
#cooling-cells = <2>;
operating-points = <
@@ -649,6 +650,7 @@
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
linux,keycode = <KEY_POWER>;
wakeup-source;
+ status = "disabled";
};
snvs_lpgpr: snvs-lpgpr {
@@ -856,6 +858,8 @@
<&clks IMX6UL_CLK_USDHC1>,
<&clks IMX6UL_CLK_USDHC1>;
clock-names = "ipg", "ahb", "per";
+ fsl,tuning-step= <2>;
+ fsl,tuning-start-tap = <20>;
bus-width = <4>;
status = "disabled";
};
@@ -869,6 +873,8 @@
<&clks IMX6UL_CLK_USDHC2>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
+ fsl,tuning-step= <2>;
+ fsl,tuning-start-tap = <20>;
status = "disabled";
};
@@ -962,6 +968,14 @@
status = "disabled";
};
+ pxp: pxp@21cc000 {
+ compatible = "fsl,imx6ul-pxp";
+ reg = <0x021cc000 0x4000>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6UL_CLK_PXP>;
+ clock-names = "axi";
+ };
+
qspi: spi@21e0000 {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
index 006690ea98c0..b6147c76d159 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
@@ -145,13 +145,20 @@
};
&usdhc1 {
- pinctrl-names = "default";
+ pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>;
- no-1-8-v;
+ pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_snvs_usdhc1_cd>;
+ pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_snvs_usdhc1_cd>;
+ pinctrl-3 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_sleep_cd>;
cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
disable-wp;
wakeup-source;
keep-power-in-suspend;
vmmc-supply = <&reg_3v3>;
+ vqmmc-supply = <&reg_sd1_vmmc>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi
index 9ad1da159768..d56728f03c35 100644
--- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
@@ -545,6 +545,12 @@
>;
};
+ pinctrl_snvs_usdhc1_sleep_cd: snvs-usdhc1-cd-grp-slp {
+ fsl,pins = <
+ MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0
+ >;
+ };
+
pinctrl_snvs_wifi_pdn: snvs-wifi-pdn-grp {
fsl,pins = <
MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x14
diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index 22e4a307fa59..b7e67d121322 100644
--- a/arch/arm/boot/dts/imx6ull.dtsi
+++ b/arch/arm/boot/dts/imx6ull.dtsi
@@ -12,6 +12,7 @@
/delete-node/ &crypto;
&cpu0 {
+ clock-frequency = <900000000>;
operating-points = <
/* kHz uV */
900000 1275000
@@ -34,6 +35,12 @@
compatible = "fsl,imx6ull-ocotp", "syscon";
};
+&pxp {
+ compatible = "fsl,imx6ull-pxp";
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+};
+
&usdhc1 {
compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc";
};
diff --git a/arch/arm/boot/dts/imx7d-meerkat96.dts b/arch/arm/boot/dts/imx7d-meerkat96.dts
new file mode 100644
index 000000000000..5339210b63d0
--- /dev/null
+++ b/arch/arm/boot/dts/imx7d-meerkat96.dts
@@ -0,0 +1,375 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Copyright (C) 2019 Linaro Ltd.
+ */
+
+/dts-v1/;
+
+#include "imx7d.dtsi"
+
+/ {
+ model = "96Boards Meerkat96 Board";
+ compatible = "novtech,imx7d-meerkat96", "fsl,imx7d";
+
+ chosen {
+ stdout-path = &uart6;
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x20000000>; /* 512MB */
+ };
+
+ reg_wlreg_on: regulator-wlreg-on {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wlreg_on>;
+ regulator-name = "wlreg_on";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100>;
+ gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_otg1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_otg2_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_leds>;
+
+ led1 {
+ label = "green:user1";
+ gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ default-state = "off";
+ };
+
+ led2 {
+ label = "green:user2";
+ gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "mmc0";
+ default-state = "off";
+ };
+
+ led3 {
+ label = "green:user3";
+ gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "mmc1";
+ default-state = "off";
+ };
+
+ led4 {
+ label = "green:user4";
+ gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "none";
+ default-state = "off";
+ panic-indicator;
+ };
+
+ led5 {
+ label = "yellow:wlan";
+ gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "phy0tx";
+ default-state = "off";
+ };
+
+ led6 {
+ label = "blue:bt";
+ gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "bluetooth-power";
+ default-state = "off";
+ };
+ };
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+};
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+};
+
+&i2c3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "okay";
+};
+
+&i2c4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c4>;
+ status = "okay";
+};
+
+&lcdif {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lcdif>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
+ assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
+ status = "okay";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
+ assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+&uart6 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart6>;
+ assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
+ assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
+ status = "okay";
+};
+
+&uart7 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart7 &pinctrl_bt_gpios>;
+ assigned-clocks = <&clks IMX7D_UART7_ROOT_SRC>;
+ assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
+ uart-has-rtscts;
+ fsl,dte-mode;
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ device-wakeup-gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = <&gpio4 17 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&usbotg1 {
+ vbus-supply = <&reg_usb_otg1_vbus>;
+ status = "okay";
+};
+
+&usbotg2 {
+ vbus-supply = <&reg_usb_otg2_vbus>;
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ keep-power-in-suspend;
+ tuning-step = <2>;
+ vmmc-supply = <&reg_3p3v>;
+ no-1-8-v;
+ broken-cd;
+ status = "okay";
+};
+
+&usdhc3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ bus-width = <4>;
+ no-1-8-v;
+ no-mmc;
+ non-removable;
+ keep-power-in-suspend;
+ wakeup-source;
+ vmmc-supply = <&reg_wlreg_on>;
+ vqmmc-supply =<&reg_3p3v>;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wlan_irq>;
+ interrupt-parent = <&gpio6>;
+ interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host-wake";
+ };
+};
+
+&iomuxc {
+ pinctrl_bt_gpios: btgpiosgrp {
+ fsl,pins = <
+ MX7D_PAD_SAI1_TX_BCLK__GPIO6_IO13 0x59
+ MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17 0x1f
+ >;
+ };
+
+ pinctrl_gpio_leds: gpioledsgrp {
+ fsl,pins = <
+ MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x59
+ MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 0x59
+ MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x59
+ MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x59
+ MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x59
+ MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f
+ MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f
+ MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f
+ >;
+ };
+
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX7D_PAD_ENET1_RGMII_RD1__I2C3_SDA 0x4000007f
+ MX7D_PAD_ENET1_RGMII_RD0__I2C3_SCL 0x4000007f
+ >;
+ };
+
+ pinctrl_i2c4: i2c4grp {
+ fsl,pins = <
+ MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f
+ MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL 0x4000007f
+ >;
+ };
+
+ pinctrl_lcdif: lcdifgrp {
+ fsl,pins = <
+ MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79
+ MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79
+ MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79
+ MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79
+ MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79
+ MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79
+ MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79
+ MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79
+ MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79
+ MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79
+ MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79
+ MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79
+ MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79
+ MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79
+ MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79
+ MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79
+ MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79
+ MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79
+ MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79
+ MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79
+ MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79
+ MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79
+ MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79
+ MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79
+ MX7D_PAD_LCD_CLK__LCD_CLK 0x79
+ MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79
+ MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79
+ MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79
+ MX7D_PAD_LCD_RESET__LCD_RESET 0x79
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79
+ MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ MX7D_PAD_SD3_DATA4__UART3_DCE_RX 0x79
+ MX7D_PAD_SD3_DATA5__UART3_DCE_TX 0x79
+ MX7D_PAD_SD3_DATA6__UART3_DCE_RTS 0x79
+ MX7D_PAD_SD3_DATA7__UART3_DCE_CTS 0x79
+ >;
+ };
+
+ pinctrl_uart6: uart6grp {
+ fsl,pins = <
+ MX7D_PAD_SD1_CD_B__UART6_DCE_RX 0x79
+ MX7D_PAD_SD1_WP__UART6_DCE_TX 0x79
+ >;
+ };
+
+ pinctrl_uart7: uart7grp {
+ fsl,pins = <
+ MX7D_PAD_ECSPI2_SCLK__UART7_DTE_TX 0x79
+ MX7D_PAD_ECSPI2_MOSI__UART7_DTE_RX 0x79
+ MX7D_PAD_ECSPI2_MISO__UART7_DTE_CTS 0x79
+ MX7D_PAD_ECSPI2_SS0__UART7_DTE_RTS 0x79
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX7D_PAD_SD1_CMD__SD1_CMD 0x59
+ MX7D_PAD_SD1_CLK__SD1_CLK 0x19
+ MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
+ MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
+ MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
+ MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
+ >;
+ };
+
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX7D_PAD_SD3_CMD__SD3_CMD 0x59
+ MX7D_PAD_SD3_CLK__SD3_CLK 0x0D
+ MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
+ MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
+ MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
+ MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
+ >;
+ };
+
+ pinctrl_wlan_irq: wlanirqgrp {
+ fsl,pins = <
+ MX7D_PAD_SAI1_TX_SYNC__GPIO6_IO14 0x19
+ >;
+ };
+
+ pinctrl_wlreg_on: wlregongrp {
+ fsl,pins = <
+ MX7D_PAD_SAI1_TX_DATA__GPIO6_IO15 0x19
+ >;
+ };
+};
diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
index 202922ed3754..869efbc4af42 100644
--- a/arch/arm/boot/dts/imx7d-sdb.dts
+++ b/arch/arm/boot/dts/imx7d-sdb.dts
@@ -263,8 +263,8 @@
};
sw2_reg: sw2 {
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1850000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
@@ -379,6 +379,18 @@
status = "okay";
};
+&reg_1p0d {
+ vin-supply = <&sw2_reg>;
+};
+
+&reg_1p2 {
+ vin-supply = <&sw2_reg>;
+};
+
+&snvs_pwrkey {
+ status = "okay";
+};
+
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
diff --git a/arch/arm/boot/dts/imx7d-zii-rpu2.dts b/arch/arm/boot/dts/imx7d-zii-rpu2.dts
index 3e467a94e8a6..4a78ddc7513d 100644
--- a/arch/arm/boot/dts/imx7d-zii-rpu2.dts
+++ b/arch/arm/boot/dts/imx7d-zii-rpu2.dts
@@ -16,7 +16,7 @@
compatible = "zii,imx7d-rpu2", "fsl,imx7d";
chosen {
- stdout-path = &uart1;
+ stdout-path = &uart2;
};
cs2000_ref: oscillator {
@@ -775,13 +775,6 @@
>;
};
- pinctrl_i2c1_gpio: i2c1gpiogrp {
- fsl,pins = <
- MX7D_PAD_I2C1_SDA__GPIO4_IO9 0x4000007f
- MX7D_PAD_I2C1_SCL__GPIO4_IO8 0x4000007f
- >;
- };
-
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f
@@ -789,13 +782,6 @@
>;
};
- pinctrl_i2c2_gpio: i2c2gpiogrp {
- fsl,pins = <
- MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x4000007f
- MX7D_PAD_I2C2_SCL__GPIO4_IO10 0x4000007f
- >;
- };
-
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX7D_PAD_I2C3_SDA__I2C3_SDA 0x4000007f
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index f33b560821b8..42528d2812a2 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -12,6 +12,8 @@
clock-frequency = <996000000>;
operating-points-v2 = <&cpu0_opp_table>;
#cooling-cells = <2>;
+ nvmem-cells = <&cpu_speed_grade>;
+ nvmem-cell-names = "speed_grade";
};
cpu1: cpu@1 {
@@ -39,15 +41,23 @@
opp-792000000 {
opp-hz = /bits/ 64 <792000000>;
- opp-microvolt = <975000>;
+ opp-microvolt = <1000000>;
clock-latency-ns = <150000>;
+ opp-supported-hw = <0xf>, <0xf>;
};
opp-996000000 {
opp-hz = /bits/ 64 <996000000>;
- opp-microvolt = <1075000>;
+ opp-microvolt = <1100000>;
clock-latency-ns = <150000>;
- opp-suspend;
+ opp-supported-hw = <0xc>, <0xf>;
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1225000>;
+ clock-latency-ns = <150000>;
+ opp-supported-hw = <0x8>, <0xf>;
};
};
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
index 106711d2c01b..c1a4fff5ceda 100644
--- a/arch/arm/boot/dts/imx7s.dtsi
+++ b/arch/arm/boot/dts/imx7s.dtsi
@@ -117,7 +117,7 @@
* non-configurable replicators don't show up on the
* AMBA bus. As such no need to add "arm,primecell"
*/
- compatible = "arm,coresight-replicator";
+ compatible = "arm,coresight-static-replicator";
out-ports {
#address-cells = <1>;
@@ -175,7 +175,7 @@
ranges;
funnel@30041000 {
- compatible = "arm,coresight-funnel", "arm,primecell";
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
reg = <0x30041000 0x1000>;
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";
@@ -217,7 +217,7 @@
};
funnel@30083000 {
- compatible = "arm,coresight-funnel", "arm,primecell";
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
reg = <0x30083000 0x1000>;
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";
@@ -551,6 +551,10 @@
tempmon_temp_grade: temp-grade@10 {
reg = <0x10 0x4>;
};
+
+ cpu_speed_grade: speed-grade@10 {
+ reg = <0x10 0x4>;
+ };
};
anatop: anatop@30360000 {
@@ -609,6 +613,7 @@
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
linux,keycode = <KEY_POWER>;
wakeup-source;
+ status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/imx7ulp-evk.dts b/arch/arm/boot/dts/imx7ulp-evk.dts
index a09026a6d22e..4245b33bb451 100644
--- a/arch/arm/boot/dts/imx7ulp-evk.dts
+++ b/arch/arm/boot/dts/imx7ulp-evk.dts
@@ -22,6 +22,25 @@
reg = <0x60000000 0x40000000>;
};
+ backlight {
+ compatible = "pwm-backlight";
+ pwms = <&tpm4 1 50000 0>;
+ brightness-levels = <0 20 25 30 35 40 100>;
+ default-brightness-level = <6>;
+ status = "okay";
+ };
+
+ reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg1_vbus>;
+ regulator-name = "usb_otg1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio_ptc 0 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
reg_vsd_3v3: regulator-vsd-3v3 {
compatible = "regulator-fixed";
regulator-name = "VSD_3V3";
@@ -40,6 +59,23 @@
status = "okay";
};
+&tpm4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm0>;
+ status = "okay";
+};
+
+&usbotg1 {
+ vbus-supply = <&reg_usb_otg1_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg1_id>;
+ srp-disable;
+ hnp-disable;
+ adp-disable;
+ over-current-active-low;
+ status = "okay";
+};
+
&usdhc0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc0>;
@@ -57,6 +93,25 @@
bias-pull-up;
};
+ pinctrl_pwm0: pwm0grp {
+ fsl,pins = <
+ IMX7ULP_PAD_PTF2__TPM4_CH1 0x2
+ >;
+ };
+
+ pinctrl_usbotg1_vbus: otg1vbusgrp {
+ fsl,pins = <
+ IMX7ULP_PAD_PTC0__PTC0 0x20000
+ >;
+ };
+
+ pinctrl_usbotg1_id: otg1idgrp {
+ fsl,pins = <
+ IMX7ULP_PAD_PTC13__USB0_ID 0x10003
+ IMX7ULP_PAD_PTC16__USB1_OC2 0x10003
+ >;
+ };
+
pinctrl_usdhc0: usdhc0grp {
fsl,pins = <
IMX7ULP_PAD_PTD1__SDHC0_CMD 0x43
diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi
index d6b711011cba..4f8f138b9999 100644
--- a/arch/arm/boot/dts/imx7ulp.dtsi
+++ b/arch/arm/boot/dts/imx7ulp.dtsi
@@ -30,6 +30,7 @@
serial1 = &lpuart5;
serial2 = &lpuart6;
serial3 = &lpuart7;
+ usbphy0 = &usbphy1;
};
cpus {
@@ -124,6 +125,16 @@
status = "disabled";
};
+ tpm4: pwm@40250000 {
+ compatible = "fsl,imx7ulp-pwm";
+ reg = <0x40250000 0x1000>;
+ assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
+ assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
+ clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
tpm5: tpm@40260000 {
compatible = "fsl,imx7ulp-tpm";
reg = <0x40260000 0x1000>;
@@ -133,6 +144,33 @@
clock-names = "ipg", "per";
};
+ usbotg1: usb@40330000 {
+ compatible = "fsl,imx7ulp-usb", "fsl,imx6ul-usb";
+ reg = <0x40330000 0x200>;
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pcc2 IMX7ULP_CLK_USB0>;
+ phys = <&usbphy1>;
+ fsl,usbmisc = <&usbmisc1 0>;
+ ahb-burst-config = <0x0>;
+ tx-burst-size-dword = <0x8>;
+ rx-burst-size-dword = <0x8>;
+ status = "disabled";
+ };
+
+ usbmisc1: usbmisc@40330200 {
+ compatible = "fsl,imx7ulp-usbmisc", "fsl,imx7d-usbmisc";
+ #index-cells = <1>;
+ reg = <0x40330200 0x200>;
+ };
+
+ usbphy1: usb-phy@0x40350000 {
+ compatible = "fsl,imx7ulp-usbphy", "fsl,imx6ul-usbphy";
+ reg = <0x40350000 0x1000>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pcc2 IMX7ULP_CLK_USB_PHY>;
+ #phy-cells = <0>;
+ };
+
usdhc0: mmc@40370000 {
compatible = "fsl,imx7ulp-usdhc", "fsl,imx6sx-usdhc";
reg = <0x40370000 0x10000>;
diff --git a/arch/arm/boot/dts/ls1021a-tsn.dts b/arch/arm/boot/dts/ls1021a-tsn.dts
new file mode 100644
index 000000000000..5b7689094b70
--- /dev/null
+++ b/arch/arm/boot/dts/ls1021a-tsn.dts
@@ -0,0 +1,289 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright 2016-2018 NXP Semiconductors
+ * Copyright 2019 Vladimir Oltean <olteanv@gmail.com>
+ */
+
+/dts-v1/;
+#include "ls1021a.dtsi"
+
+/ {
+ model = "NXP LS1021A-TSN Board";
+
+ sys_mclk: clock-mclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24576000>;
+ };
+
+ reg_vdda_codec: regulator-3V3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ reg_vddio_codec: regulator-2V5 {
+ compatible = "regulator-fixed";
+ regulator-name = "2P5V";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-always-on;
+ };
+};
+
+&dspi0 {
+ bus-num = <0>;
+ status = "okay";
+
+ /* ADG704BRMZ 1:4 SPI mux/demux */
+ sja1105: ethernet-switch@1 {
+ reg = <0x1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nxp,sja1105t";
+ /* 12 MHz */
+ spi-max-frequency = <12000000>;
+ /* Sample data on trailing clock edge */
+ spi-cpha;
+ /* SPI controller settings for SJA1105 timing requirements */
+ fsl,spi-cs-sck-delay = <1000>;
+ fsl,spi-sck-cs-delay = <1000>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ /* ETH5 written on chassis */
+ label = "swp5";
+ phy-handle = <&rgmii_phy6>;
+ phy-mode = "rgmii-id";
+ reg = <0>;
+ };
+
+ port@1 {
+ /* ETH2 written on chassis */
+ label = "swp2";
+ phy-handle = <&rgmii_phy3>;
+ phy-mode = "rgmii-id";
+ reg = <1>;
+ };
+
+ port@2 {
+ /* ETH3 written on chassis */
+ label = "swp3";
+ phy-handle = <&rgmii_phy4>;
+ phy-mode = "rgmii-id";
+ reg = <2>;
+ };
+
+ port@3 {
+ /* ETH4 written on chassis */
+ label = "swp4";
+ phy-handle = <&rgmii_phy5>;
+ phy-mode = "rgmii-id";
+ reg = <3>;
+ };
+
+ port@4 {
+ /* Internal port connected to eth2 */
+ ethernet = <&enet2>;
+ phy-mode = "rgmii";
+ reg = <4>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+ };
+};
+
+&enet0 {
+ tbi-handle = <&tbi0>;
+ phy-handle = <&sgmii_phy2>;
+ phy-mode = "sgmii";
+ status = "okay";
+};
+
+&enet1 {
+ tbi-handle = <&tbi1>;
+ phy-handle = <&sgmii_phy1>;
+ phy-mode = "sgmii";
+ status = "okay";
+};
+
+/* RGMII delays added via PCB traces */
+&enet2 {
+ phy-mode = "rgmii";
+ status = "okay";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
+
+&esdhc {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+
+ /* 3 axis accelerometer */
+ accelerometer@1e {
+ compatible = "fsl,fxls8471";
+ position = <0>;
+ reg = <0x1e>;
+ };
+
+ /* Audio codec (SAI2) */
+ audio-codec@2a {
+ compatible = "fsl,sgtl5000";
+ VDDIO-supply = <&reg_vddio_codec>;
+ VDDA-supply = <&reg_vdda_codec>;
+ #sound-dai-cells = <0>;
+ clocks = <&sys_mclk>;
+ reg = <0x2a>;
+ };
+
+ /* Current sensing circuit for 1V VDDCORE PMIC rail */
+ current-sensor@44 {
+ compatible = "ti,ina220";
+ shunt-resistor = <1000>;
+ reg = <0x44>;
+ };
+
+ /* Current sensing circuit for 12V VCC rail */
+ current-sensor@45 {
+ compatible = "ti,ina220";
+ shunt-resistor = <1000>;
+ reg = <0x45>;
+ };
+
+ /* Thermal monitor - case */
+ temperature-sensor@48 {
+ compatible = "national,lm75";
+ reg = <0x48>;
+ };
+
+ /* Thermal monitor - chip */
+ temperature-sensor@4c {
+ compatible = "ti,tmp451";
+ reg = <0x4c>;
+ };
+
+ eeprom@51 {
+ compatible = "atmel,24c32";
+ reg = <0x51>;
+ };
+
+ /* Unsupported devices:
+ * - FXAS21002C Gyroscope at 0x20
+ * - TI ADS7924 4-channel ADC at 0x49
+ */
+};
+
+&ifc {
+ status = "disabled";
+};
+
+&lpuart0 {
+ status = "okay";
+};
+
+&lpuart3 {
+ status = "okay";
+};
+
+&mdio0 {
+ /* AR8031 */
+ sgmii_phy1: ethernet-phy@1 {
+ reg = <0x1>;
+ };
+
+ /* AR8031 */
+ sgmii_phy2: ethernet-phy@2 {
+ reg = <0x2>;
+ };
+
+ /* BCM5464 quad PHY */
+ rgmii_phy3: ethernet-phy@3 {
+ reg = <0x3>;
+ };
+
+ rgmii_phy4: ethernet-phy@4 {
+ reg = <0x4>;
+ };
+
+ rgmii_phy5: ethernet-phy@5 {
+ reg = <0x5>;
+ };
+
+ rgmii_phy6: ethernet-phy@6 {
+ reg = <0x6>;
+ };
+
+ /* SGMII PCS for enet0 */
+ tbi0: tbi-phy@1f {
+ reg = <0x1f>;
+ device_type = "tbi-phy";
+ };
+};
+
+&mdio1 {
+ /* SGMII PCS for enet1 */
+ tbi1: tbi-phy@1f {
+ reg = <0x1f>;
+ device_type = "tbi-phy";
+ };
+};
+
+&qspi {
+ status = "okay";
+
+ flash@0 {
+ /* Rev. A uses 64MB flash, Rev. B & C use 32MB flash */
+ compatible = "jedec,spi-nor", "s25fl256s1", "s25fl512s";
+ spi-max-frequency = <20000000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "RCW";
+ reg = <0x0 0x40000>;
+ };
+
+ partition@40000 {
+ label = "U-Boot";
+ reg = <0x40000 0x300000>;
+ };
+
+ partition@340000 {
+ label = "U-Boot Env";
+ reg = <0x340000 0x100000>;
+ };
+ };
+ };
+};
+
+&sai2 {
+ status = "okay";
+};
+
+&sata {
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/vf610-zii-dev.dtsi b/arch/arm/boot/dts/vf610-zii-dev.dtsi
index 0507e6dcbb21..a1b4ccee2a10 100644
--- a/arch/arm/boot/dts/vf610-zii-dev.dtsi
+++ b/arch/arm/boot/dts/vf610-zii-dev.dtsi
@@ -177,6 +177,36 @@
status = "okay";
};
+&qspi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_qspi0>;
+ status = "okay";
+
+ /*
+ * Attached MT25QL02 can go up to 90Mhz in DTR and 166 in STR
+ * modes, so, spi-max-frequency is limited to 90MHz
+ */
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <90000000>;
+ spi-rx-bus-width = <4>;
+ reg = <0>;
+ m25p,fast-read;
+ };
+
+ flash@2 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <90000000>;
+ spi-rx-bus-width = <4>;
+ reg = <2>;
+ m25p,fast-read;
+ };
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0>;
@@ -360,12 +390,18 @@
pinctrl_qspi0: qspi0grp {
fsl,pins = <
- VF610_PAD_PTD7__QSPI0_B_QSCK 0x31c3
- VF610_PAD_PTD8__QSPI0_B_CS0 0x31ff
- VF610_PAD_PTD9__QSPI0_B_DATA3 0x31c3
- VF610_PAD_PTD10__QSPI0_B_DATA2 0x31c3
- VF610_PAD_PTD11__QSPI0_B_DATA1 0x31c3
- VF610_PAD_PTD12__QSPI0_B_DATA0 0x31c3
+ VF610_PAD_PTD0__QSPI0_A_QSCK 0x38c2
+ VF610_PAD_PTD1__QSPI0_A_CS0 0x38c2
+ VF610_PAD_PTD2__QSPI0_A_DATA3 0x38c3
+ VF610_PAD_PTD3__QSPI0_A_DATA2 0x38c3
+ VF610_PAD_PTD4__QSPI0_A_DATA1 0x38c3
+ VF610_PAD_PTD5__QSPI0_A_DATA0 0x38c3
+ VF610_PAD_PTD7__QSPI0_B_QSCK 0x38c2
+ VF610_PAD_PTD8__QSPI0_B_CS0 0x38c2
+ VF610_PAD_PTD9__QSPI0_B_DATA3 0x38c3
+ VF610_PAD_PTD10__QSPI0_B_DATA2 0x38c3
+ VF610_PAD_PTD11__QSPI0_B_DATA1 0x38c3
+ VF610_PAD_PTD12__QSPI0_B_DATA0 0x38c3
>;
};
@@ -385,8 +421,8 @@
pinctrl_uart2: uart2grp {
fsl,pins = <
- VF610_PAD_PTD0__UART2_TX 0x21a2
- VF610_PAD_PTD1__UART2_RX 0x21a1
+ VF610_PAD_PTD23__UART2_TX 0x21a2
+ VF610_PAD_PTD22__UART2_RX 0x21a1
>;
};
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-26 00:59:30 +0100