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authorMarc Zyngier <marc.zyngier@arm.com>2011-11-12 17:09:49 +0100
committerMarc Zyngier <marc.zyngier@arm.com>2011-11-15 19:13:03 +0100
commitdb0d4db22a78d31c59087f7057b8f1612fecc35d (patch)
treee2d84ee2c816d4bef066806863a3937792a08581 /arch/arm/common/Kconfig
parentLinux 3.2-rc2 (diff)
downloadlinux-db0d4db22a78d31c59087f7057b8f1612fecc35d.tar.xz
linux-db0d4db22a78d31c59087f7057b8f1612fecc35d.zip
ARM: gic: allow GIC to support non-banked setups
The GIC support code is heavily using the fact that hardware implementations are exposing banked registers. Unfortunately, it looks like at least one GIC implementation (EXYNOS) offers both the distributor and the CPU interfaces at different addresses, depending on the CPU. This problem is solved by allowing the distributor and CPU interface addresses to be per-cpu variables for the platforms that require it. The EXYNOS code is updated not to mess with the GIC internals while handling interrupts, and struct gic_chip_data is back to being private. The DT binding for the gic is updated to allow an optional "cpu-offset" value, which is used to compute the various base addresses. Finally, a new config option (GIC_NON_BANKED) is used to control this feature, so the overhead is only present on kernels compiled with support for EXYNOS. Tested on Origen (EXYNOS4) and Panda (OMAP4). Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'arch/arm/common/Kconfig')
-rw-r--r--arch/arm/common/Kconfig3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 74df9ca2be31..a3beda1213da 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -2,6 +2,9 @@ config ARM_GIC
select IRQ_DOMAIN
bool
+config GIC_NON_BANKED
+ bool
+
config ARM_VIC
bool