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authorWill Deacon <will.deacon@arm.com>2013-05-13 13:08:06 +0200
committerWill Deacon <will.deacon@arm.com>2013-08-12 13:25:45 +0200
commite3ab547f57bd626201d4b715b696c80ad1ef4ba2 (patch)
tree08e1ae7bf041dad378c1bc62385b99f2795b6141 /arch/arm/common/vlock.S
parentARM: spinlock: use inner-shareable dsb variant prior to sev instruction (diff)
downloadlinux-e3ab547f57bd626201d4b715b696c80ad1ef4ba2.tar.xz
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ARM: kvm: use inner-shareable barriers after TLB flushing
When flushing the TLB at PL2 in response to remapping at stage-2 or VMID rollover, we have a dsb instruction to ensure completion of the command before continuing. Since we only care about other processors for TLB invalidation, use the inner-shareable variant of the dsb instruction instead. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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