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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-12-04 17:01:03 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-12-14 20:21:40 +0100 |
| commit | 384895330e0f3954d9478fd0853145f9c169df12 (patch) | |
| tree | c90f70f4e070b640a1f1f2a76cf4acf864354093 /arch/arm/common | |
| parent | ARM: GIC: provide a single initialization function for boot CPU (diff) | |
| download | linux-384895330e0f3954d9478fd0853145f9c169df12.tar.xz linux-384895330e0f3954d9478fd0853145f9c169df12.zip | |
ARM: GIC: Remove MMIO address from gic_cpu_init, rename to gic_secondary_init
We don't need to re-pass the base address for the CPU interfaces to the
GIC for secondary CPUs, as it will never be different from the boot CPU
- and even if it was, we'd overwrite the boot CPU's base address.
Get rid of this argument, and rename to gic_secondary_init().
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/common')
| -rw-r--r-- | arch/arm/common/gic.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 8eab2f34a7fa..dd0d18d560ac 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -284,7 +284,7 @@ static void __init gic_dist_init(unsigned int gic_nr, void __iomem *base, writel(1, base + GIC_DIST_CTRL); } -void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base) +static void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base) { void __iomem *dist_base; int i; @@ -321,6 +321,11 @@ void __init gic_init(unsigned int gic_nr, unsigned int irq_start, gic_cpu_init(gic_nr, cpu_base); } +void __cpuinit gic_secondary_init(unsigned int gic_nr) +{ + gic_cpu_init(gic_nr, gic_data[gic_nr].cpu_base); +} + #ifdef CONFIG_SMP void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) { |