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author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-01-13 09:33:26 +0100 |
---|---|---|
committer | Herbert Xu <herbert@gondor.apana.org.au> | 2017-01-13 11:47:21 +0100 |
commit | 658fa754cd0700e8e96d61898f0953c4514859c6 (patch) | |
tree | edb9b33f81a9c4eaf62b1532b321c2776769ecb2 /arch/arm/crypto | |
parent | hwrng: n2 - update version info (diff) | |
download | linux-658fa754cd0700e8e96d61898f0953c4514859c6.tar.xz linux-658fa754cd0700e8e96d61898f0953c4514859c6.zip |
crypto: arm/aes - avoid reserved 'tt' mnemonic in asm code
The ARMv8-M architecture introduces 'tt' and 'ttt' instructions,
which means we can no longer use 'tt' as a register alias on recent
versions of binutils for ARM. So replace the alias with 'ttab'.
Fixes: 81edb4262975 ("crypto: arm/aes - replace scalar AES cipher")
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'arch/arm/crypto')
-rw-r--r-- | arch/arm/crypto/aes-cipher-core.S | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/crypto/aes-cipher-core.S b/arch/arm/crypto/aes-cipher-core.S index b04261e1e068..c817a86c4ca8 100644 --- a/arch/arm/crypto/aes-cipher-core.S +++ b/arch/arm/crypto/aes-cipher-core.S @@ -18,7 +18,7 @@ rounds .req r1 in .req r2 out .req r3 - tt .req ip + ttab .req ip t0 .req lr t1 .req r2 @@ -34,9 +34,9 @@ .macro __load, out, in, idx .if __LINUX_ARM_ARCH__ < 7 && \idx > 0 - ldr \out, [tt, \in, lsr #(8 * \idx) - 2] + ldr \out, [ttab, \in, lsr #(8 * \idx) - 2] .else - ldr \out, [tt, \in, lsl #2] + ldr \out, [ttab, \in, lsl #2] .endif .endm @@ -136,7 +136,7 @@ eor r6, r6, r10 eor r7, r7, r11 - __adrl tt, \ttab + __adrl ttab, \ttab tst rounds, #2 bne 1f @@ -146,7 +146,7 @@ 1: subs rounds, rounds, #4 \round r8, r9, r10, r11, r4, r5, r6, r7 - __adrl tt, \ltab, ls + __adrl ttab, \ltab, ls \round r4, r5, r6, r7, r8, r9, r10, r11 bhi 0b |