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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-10-24 23:36:36 +0200 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-10-29 20:13:09 +0100 |
| commit | df71dfd4ca01130f98d9dbfab76c440d72a177c6 (patch) | |
| tree | 5050d23a67be5fc5fabd4e6d96ac89786fb2a9c9 /arch/arm/include/asm/cacheflush.h | |
| parent | ARM: Fix sparsemem with SPARSEMEM_EXTREME enabled (diff) | |
| download | linux-df71dfd4ca01130f98d9dbfab76c440d72a177c6.tar.xz linux-df71dfd4ca01130f98d9dbfab76c440d72a177c6.zip | |
ARM: Fix errata 411920 workarounds
Errata 411920 indicates that any "invalidate entire instruction cache"
operation can fail if the right conditions are present. This is not
limited just to those operations in flush.c, but elsewhere. Place the
workaround in the already existing __flush_icache_all() function
instead.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include/asm/cacheflush.h')
| -rw-r--r-- | arch/arm/include/asm/cacheflush.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h index fd03fb63a332..3d0cdd21b882 100644 --- a/arch/arm/include/asm/cacheflush.h +++ b/arch/arm/include/asm/cacheflush.h @@ -414,9 +414,14 @@ extern void __flush_dcache_page(struct address_space *mapping, struct page *page static inline void __flush_icache_all(void) { +#ifdef CONFIG_ARM_ERRATA_411920 + extern void v6_icache_inval_all(void); + v6_icache_inval_all(); +#else asm("mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache\n" : : "r" (0)); +#endif } #define ARCH_HAS_FLUSH_ANON_PAGE |