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authorMarc Zyngier <marc.zyngier@arm.com>2018-02-06 18:56:14 +0100
committerCatalin Marinas <catalin.marinas@arm.com>2018-02-06 23:54:05 +0100
commit6167ec5c9145cdf493722dfd80a5d48bafc4a18a (patch)
treecdabac4f0a97488800cf46264d53b3cbbefbd65c /arch/arm/include/asm/kvm_host.h
parentarm/arm64: KVM: Turn kvm_psci_version into a static inline (diff)
downloadlinux-6167ec5c9145cdf493722dfd80a5d48bafc4a18a.tar.xz
linux-6167ec5c9145cdf493722dfd80a5d48bafc4a18a.zip
arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support
A new feature of SMCCC 1.1 is that it offers firmware-based CPU workarounds. In particular, SMCCC_ARCH_WORKAROUND_1 provides BP hardening for CVE-2017-5715. If the host has some mitigation for this issue, report that we deal with it using SMCCC_ARCH_WORKAROUND_1, as we apply the host workaround on every guest exit. Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/include/asm/kvm_host.h')
-rw-r--r--arch/arm/include/asm/kvm_host.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/include/asm/kvm_host.h b/arch/arm/include/asm/kvm_host.h
index acbf9ec7b396..ef54013b5b9f 100644
--- a/arch/arm/include/asm/kvm_host.h
+++ b/arch/arm/include/asm/kvm_host.h
@@ -306,4 +306,11 @@ static inline void kvm_fpsimd_flush_cpu_state(void) {}
static inline void kvm_arm_vhe_guest_enter(void) {}
static inline void kvm_arm_vhe_guest_exit(void) {}
+
+static inline bool kvm_arm_harden_branch_predictor(void)
+{
+ /* No way to detect it yet, pretend it is not there. */
+ return false;
+}
+
#endif /* __ARM_KVM_HOST_H__ */