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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-04-28 16:24:10 +0200 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-05-30 01:49:00 +0200 |
| commit | 805604ef8596968e5f251c69fd92bd3b8f466317 (patch) | |
| tree | 9c40d7d4a2bcf3fb5ac810366e174ce4179659d8 /arch/arm/include/asm/mach | |
| parent | ARM: l2c: always enable non-secure access to lockdown registers (diff) | |
| download | linux-805604ef8596968e5f251c69fd92bd3b8f466317.tar.xz linux-805604ef8596968e5f251c69fd92bd3b8f466317.zip | |
ARM: l2c: add platform independent core L2 cache OF initialisation
Add a hook into the core ARM code to perform L2 cache initialisation
in a platform independent manner. Platforms still get to indicate
their auxiliary control register values and mask, but the
initialisation call will now be made from generic code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include/asm/mach')
| -rw-r--r-- | arch/arm/include/asm/mach/arch.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h index 17a3fa2979e8..5249cc3c52f4 100644 --- a/arch/arm/include/asm/mach/arch.h +++ b/arch/arm/include/asm/mach/arch.h @@ -45,6 +45,9 @@ struct machine_desc { unsigned char reserve_lp1 :1; /* never has lp1 */ unsigned char reserve_lp2 :1; /* never has lp2 */ enum reboot_mode reboot_mode; /* default restart mode */ + unsigned l2c_aux_val; /* L2 cache aux value */ + unsigned l2c_aux_mask; /* L2 cache aux mask */ + void (*l2c_write_sec)(unsigned long, unsigned); struct smp_operations *smp; /* SMP operations */ bool (*smp_init)(void); void (*fixup)(struct tag *, char **, |