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authorArnd Bergmann <arnd@arndb.de>2014-11-21 13:04:06 +0100
committerArnd Bergmann <arnd@arndb.de>2014-11-21 13:04:06 +0100
commit6febbf472b6f3df1b6a137fe246ac88dcd5b2c0e (patch)
tree96d30ffad60888ff22285782950564c3eea87d0b /arch/arm/include/debug
parentMerge tag 'berlin-soc-3.19-2' of git://git.infradead.org/users/hesselba/linux... (diff)
parentARM: shmobile: Add early debugging support using SCIF(A) (diff)
downloadlinux-6febbf472b6f3df1b6a137fe246ac88dcd5b2c0e.tar.xz
linux-6febbf472b6f3df1b6a137fe246ac88dcd5b2c0e.zip
Merge tag 'renesas-soc4-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Pull "Fourth Round of Renesas ARM Based SoC Updates for v3.19" from Simon Horman: * Add early debugging support using SCIF(A) * tag 'renesas-soc4-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Add early debugging support using SCIF(A) Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/include/debug')
-rw-r--r--arch/arm/include/debug/renesas-scif.S52
1 files changed, 52 insertions, 0 deletions
diff --git a/arch/arm/include/debug/renesas-scif.S b/arch/arm/include/debug/renesas-scif.S
new file mode 100644
index 000000000000..97820a8df51a
--- /dev/null
+++ b/arch/arm/include/debug/renesas-scif.S
@@ -0,0 +1,52 @@
+/*
+ * Renesas SCIF(A) debugging macro include header
+ *
+ * Based on r8a7790.S
+ *
+ * Copyright (C) 2012-2013 Renesas Electronics Corporation
+ * Copyright (C) 1994-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#define SCIF_PHYS CONFIG_DEBUG_UART_PHYS
+#define SCIF_VIRT ((SCIF_PHYS & 0x00ffffff) | 0xfd000000)
+
+#if CONFIG_DEBUG_UART_PHYS < 0xe6e00000
+/* SCIFA */
+#define FTDR 0x20
+#define FSR 0x14
+#else
+/* SCIF */
+#define FTDR 0x0c
+#define FSR 0x10
+#endif
+
+#define TDFE (1 << 5)
+#define TEND (1 << 6)
+
+ .macro addruart, rp, rv, tmp
+ ldr \rp, =SCIF_PHYS
+ ldr \rv, =SCIF_VIRT
+ .endm
+
+ .macro waituart, rd, rx
+1001: ldrh \rd, [\rx, #FSR]
+ tst \rd, #TDFE
+ beq 1001b
+ .endm
+
+ .macro senduart, rd, rx
+ strb \rd, [\rx, #FTDR]
+ ldrh \rd, [\rx, #FSR]
+ bic \rd, \rd, #TEND
+ strh \rd, [\rx, #FSR]
+ .endm
+
+ .macro busyuart, rd, rx
+1001: ldrh \rd, [\rx, #FSR]
+ tst \rd, #TEND
+ beq 1001b
+ .endm