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| author | Rob Herring <rob.herring@calxeda.com> | 2011-09-29 04:25:31 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2011-10-31 14:03:24 +0100 |
| commit | 4294f8baaf174c9aa57886e7ed27caf4b02578f6 (patch) | |
| tree | efc535ff45a6d405a6befecd421ad1091a2d5ad6 /arch/arm/include | |
| parent | irq: support domains with non-zero hwirq base (diff) | |
| download | linux-4294f8baaf174c9aa57886e7ed27caf4b02578f6.tar.xz linux-4294f8baaf174c9aa57886e7ed27caf4b02578f6.zip | |
ARM: gic: add irq_domain support
Convert the gic interrupt controller to use irq domains in preparation
for device-tree binding and MULTI_IRQ. This allows for translation between
GIC interrupt IDs and Linux irq numbers.
The meaning of irq_offset has changed. It now is just the number of skipped
GIC interrupt IDs for the controller. It will be 16 for primary GIC and 32
for secondary GICs.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Jamie Iles <jamie@jamieiles.com>
Tested-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/hardware/gic.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h index 14867e12f205..43a05d90e43b 100644 --- a/arch/arm/include/asm/hardware/gic.h +++ b/arch/arm/include/asm/hardware/gic.h @@ -33,6 +33,9 @@ #define GIC_DIST_SOFTINT 0xf00 #ifndef __ASSEMBLY__ +#include <linux/irqdomain.h> +struct device_node; + extern void __iomem *gic_cpu_base_addr; extern struct irq_chip gic_arch_extn; @@ -42,7 +45,6 @@ void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); struct gic_chip_data { - unsigned int irq_offset; void __iomem *dist_base; void __iomem *cpu_base; #ifdef CONFIG_CPU_PM @@ -52,6 +54,9 @@ struct gic_chip_data { u32 __percpu *saved_ppi_enable; u32 __percpu *saved_ppi_conf; #endif +#ifdef CONFIG_IRQ_DOMAIN + struct irq_domain domain; +#endif unsigned int gic_irqs; }; #endif |