diff options
| author | Victor Kamensky <victor.kamensky@linaro.org> | 2014-01-21 06:45:11 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-01-28 15:34:02 +0100 |
| commit | f8fe23ec4e89b58e63085ea92348aff3bcca3e14 (patch) | |
| tree | c7ecc240b1be5714624b39d08f564fe0b3d33e06 /arch/arm/kernel/entry-armv.S | |
| parent | ARM: 7938/1: OMAP4/highbank: Flush L2 cache before disabling (diff) | |
| download | linux-f8fe23ec4e89b58e63085ea92348aff3bcca3e14.tar.xz linux-f8fe23ec4e89b58e63085ea92348aff3bcca3e14.zip | |
ARM: 7946/1: asm: __und_usr_thumb need byteswap instructions in BE case
__und_usr_thumb function deals with thumb2 opcodes. In case of BE
image, it needs to byteswap half word thumb2 encoded instructions
before further processing them.
Without this fix BE image user-land thread executing first VFP
instruction encoded in thumb2 fails with SIGILL, because kernel
does not recognize instruction and does not enable VFP.
Reported-by: Corey Melton <comelton@cisco.com>
Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
Tested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm/kernel/entry-armv.S | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index b3fb8c9e1ff2..1879e8dd2acc 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -451,9 +451,11 @@ __und_usr_thumb: .arch armv6t2 #endif 2: ldrht r5, [r4] +ARM_BE8(rev16 r5, r5) @ little endian instruction cmp r5, #0xe800 @ 32bit instruction if xx != 0 blo __und_usr_fault_16 @ 16bit undefined instruction 3: ldrht r0, [r2] +ARM_BE8(rev16 r0, r0) @ little endian instruction add r2, r2, #2 @ r2 is PC + 2, make it PC + 4 str r2, [sp, #S_PC] @ it's a 2x16bit instr, update orr r0, r0, r5, lsl #16 |