summaryrefslogtreecommitdiffstats
path: root/arch/arm/kernel/head-nommu.S
diff options
context:
space:
mode:
authorJonathan Austin <jonathan.austin@arm.com>2013-02-22 19:51:30 +0100
committerJonathan Austin <jonathan.austin@arm.com>2013-06-07 18:02:53 +0200
commiteb08375ea66e63c5e11dea69b43c5633d531ce81 (patch)
treecb15407c3e6c2a2eaced0a9662c947136ed7a1b3 /arch/arm/kernel/head-nommu.S
parentARM: mpu: Complete initialisation of the MPU after reaching the C-world (diff)
downloadlinux-eb08375ea66e63c5e11dea69b43c5633d531ce81.tar.xz
linux-eb08375ea66e63c5e11dea69b43c5633d531ce81.zip
ARM: mpu: add MPU initialisation for secondary cores
The MPU initialisation on the primary core is performed in two stages, one minimal stage to ensure the CPU can boot and a second one after sanity_check_meminfo. As the memory configuration is known by the time we boot secondary cores only a single step is necessary, provided the values for DRSR are passed to secondaries. This patch implements this arrangement. The configuration generated for the MPU regions is made available to the secondary core, which can then use the asm MPU intialisation code to program a complete region configuration. This is necessary for SMP configurations without an MMU, as the MPU initialisation is the only way to ensure that memory is specified as 'shared'. Signed-off-by: Jonathan Austin <jonathan.austin@arm.com> Reviewed-by: Will Deacon <will.deacon@arm.com> CC: Nicolas Pitre <nico@linaro.org>
Diffstat (limited to 'arch/arm/kernel/head-nommu.S')
-rw-r--r--arch/arm/kernel/head-nommu.S7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index 659912c49571..13741d004de5 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -107,6 +107,13 @@ ENTRY(secondary_startup)
adr r4, __secondary_data
ldmia r4, {r7, r12}
+
+#ifdef CONFIG_ARM_MPU
+ /* Use MPU region info supplied by __cpu_up */
+ ldr r6, [r7] @ get secondary_data.mpu_szr
+ bl __setup_mpu @ Initialize the MPU
+#endif
+
adr lr, BSYM(__after_proc_init) @ return address
mov r13, r12 @ __secondary_switched address
ARM( add pc, r10, #PROCINFO_INITFUNC )