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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2006-07-26 19:57:40 +0200
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-07-26 19:57:40 +0200
commit34d926266500919a43520d3d52a4f7020b9f0687 (patch)
tree4d5e809a5619b8daa0d382b39f509dd2fff63ff8 /arch/arm/kernel/head.S
parent[ARM] 3731/1: Allow IRQ definitions of IQ80331 and IQ80332 to co-exist (diff)
downloadlinux-34d926266500919a43520d3d52a4f7020b9f0687.tar.xz
linux-34d926266500919a43520d3d52a4f7020b9f0687.zip
[ARM] Fix SMP booting
Processor support files now use r6 in their CPU setup code, so we can't rely on r6 being preserved. Use r7 instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/head.S')
-rw-r--r--arch/arm/kernel/head.S6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 2242f5f7cb7d..4fe386eea4b4 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -114,9 +114,9 @@ ENTRY(secondary_startup)
* Use the page tables supplied from __cpu_up.
*/
adr r4, __secondary_data
- ldmia r4, {r5, r6, r13} @ address to jump to after
+ ldmia r4, {r5, r7, r13} @ address to jump to after
sub r4, r4, r5 @ mmu has been enabled
- ldr r4, [r6, r4] @ get secondary_data.pgdir
+ ldr r4, [r7, r4] @ get secondary_data.pgdir
adr lr, __enable_mmu @ return address
add pc, r10, #12 @ initialise processor
@ (return control reg)
@@ -125,7 +125,7 @@ ENTRY(secondary_startup)
* r6 = &secondary_data
*/
ENTRY(__secondary_switched)
- ldr sp, [r6, #4] @ get secondary_data.stack
+ ldr sp, [r7, #4] @ get secondary_data.stack
mov fp, #0
b secondary_start_kernel