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| author | Marc Zyngier <marc.zyngier@arm.com> | 2013-01-04 18:44:15 +0100 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2013-01-10 22:08:55 +0100 |
| commit | d01723479e6a6c70c83295f7847477a016d5e14a (patch) | |
| tree | 11daf853183da10d5177876716a4b2771e642e70 /arch/arm/kernel/hyp-stub.S | |
| parent | ARM: virt: boot secondary CPUs through the right entry point (diff) | |
| download | linux-d01723479e6a6c70c83295f7847477a016d5e14a.tar.xz linux-d01723479e6a6c70c83295f7847477a016d5e14a.zip | |
ARM: virt: simplify __hyp_stub_install epilog
__hyp_stub_install duplicates quite a bit of safe_svcmode_maskall
by forcing the CPU back to SVC. This is unnecessary, as
safe_svcmode_maskall is called just after.
Furthermore, the way we build SPSR_hyp is buggy as we fail to mask
the interrupts, leading to interesting behaviours on TC2 + UEFI.
The fix is to simply remove this code and rely on safe_svcmode_maskall
to do the right thing.
Cc: <stable@vger.kernel.org>
Reviewed-by: Dave Martin <dave.martin@linaro.org>
Reported-by: Harry Liebel <harry.liebel@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm/kernel/hyp-stub.S')
| -rw-r--r-- | arch/arm/kernel/hyp-stub.S | 12 |
1 files changed, 3 insertions, 9 deletions
diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S index 3c60256d3927..1315c4ccfa56 100644 --- a/arch/arm/kernel/hyp-stub.S +++ b/arch/arm/kernel/hyp-stub.S @@ -120,7 +120,8 @@ ENTRY(__hyp_stub_install_secondary) * Eventually, CPU-specific code might be needed -- assume not for now * * This code relies on the "eret" instruction to synchronize the - * various coprocessor accesses. + * various coprocessor accesses. This is done when we switch to SVC + * (see safe_svcmode_maskall). */ @ Now install the hypervisor stub: adr r7, __hyp_stub_vectors @@ -155,14 +156,7 @@ THUMB( orr r7, #(1 << 30) ) @ HSCTLR.TE 1: #endif - bic r7, r4, #MODE_MASK - orr r7, r7, #SVC_MODE -THUMB( orr r7, r7, #PSR_T_BIT ) - msr spsr_cxsf, r7 @ This is SPSR_hyp. - - __MSR_ELR_HYP(14) @ msr elr_hyp, lr - __ERET @ return, switching to SVC mode - @ The boot CPU mode is left in r4. + bx lr @ The boot CPU mode is left in r4. ENDPROC(__hyp_stub_install_secondary) __hyp_stub_do_trap: |