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| author | Will Deacon <will.deacon@arm.com> | 2011-07-19 23:41:36 +0200 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2011-08-31 11:18:00 +0200 |
| commit | d2b41f7456223ba6abd3b38d7b54be97914f3aa5 (patch) | |
| tree | 08ffd6f54daa58de58ae3ae7f5017f26bed6f9aa /arch/arm/kernel/perf_event_v6.c | |
| parent | ARM: perf: index ARMv7 event counters starting from zero (diff) | |
| download | linux-d2b41f7456223ba6abd3b38d7b54be97914f3aa5.tar.xz linux-d2b41f7456223ba6abd3b38d7b54be97914f3aa5.zip | |
ARM: perf: index Xscale and ARMv6 event counters starting from zero
Now that the ARMv7 PMU backend indexes event counters from zero, follow
suit and do the same for ARMv6 and Xscale.
Acked-by: Jamie Iles <jamie@jamieiles.com>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm/kernel/perf_event_v6.c')
| -rw-r--r-- | arch/arm/kernel/perf_event_v6.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c index d1abe97ae08a..87f29b553b8f 100644 --- a/arch/arm/kernel/perf_event_v6.c +++ b/arch/arm/kernel/perf_event_v6.c @@ -54,7 +54,7 @@ enum armv6_perf_types { }; enum armv6_counters { - ARMV6_CYCLE_COUNTER = 1, + ARMV6_CYCLE_COUNTER = 0, ARMV6_COUNTER0, ARMV6_COUNTER1, }; @@ -487,7 +487,7 @@ armv6pmu_handle_irq(int irq_num, perf_sample_data_init(&data, 0); cpuc = &__get_cpu_var(cpu_hw_events); - for (idx = 0; idx <= armpmu->num_events; ++idx) { + for (idx = 0; idx < armpmu->num_events; ++idx) { struct perf_event *event = cpuc->events[idx]; struct hw_perf_event *hwc; |