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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2015-12-22 08:24:59 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2016-01-04 12:12:10 +0100 |
| commit | 5008efc83bf85b647aa1cbc44718b1675bbb7444 (patch) | |
| tree | 728eb22528c2db224e9aec379df4fabec18dfd6a /arch/arm/kernel/pj4-cp0.c | |
| parent | ARM: 8482/1: l2x0: make it possible to disable outer sync from DT (diff) | |
| download | linux-5008efc83bf85b647aa1cbc44718b1675bbb7444.tar.xz linux-5008efc83bf85b647aa1cbc44718b1675bbb7444.zip | |
ARM: 8452/3: PJ4: make coprocessor access sequences buildable in Thumb2 mode
The PJ4 inline asm sequence to write to cp15 cannot be built in Thumb-2
mode, due to the way it performs arithmetic on the program counter, so it
is built in ARM mode instead. However, building C files in ARM mode under
CONFIG_THUMB2_KERNEL is problematic, since the instrumentation performed
by subsystems like ftrace does not expect having to deal with interworking
branches.
Since the sequence in question is simply a poor man's ISB instruction,
let's use a straight 'isb' instead when building in Thumb2 mode. Thumb2
implies V7, so 'isb' should always be supported in that case.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/pj4-cp0.c')
| -rw-r--r-- | arch/arm/kernel/pj4-cp0.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/kernel/pj4-cp0.c b/arch/arm/kernel/pj4-cp0.c index 8153e36b2491..7c9248b74d3f 100644 --- a/arch/arm/kernel/pj4-cp0.c +++ b/arch/arm/kernel/pj4-cp0.c @@ -66,9 +66,13 @@ static void __init pj4_cp_access_write(u32 value) __asm__ __volatile__ ( "mcr p15, 0, %1, c1, c0, 2\n\t" +#ifdef CONFIG_THUMB2_KERNEL + "isb\n\t" +#else "mrc p15, 0, %0, c1, c0, 2\n\t" "mov %0, %0\n\t" "sub pc, pc, #4\n\t" +#endif : "=r" (temp) : "r" (value)); } |