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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2015-03-19 19:04:05 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2015-03-28 16:46:15 +0100 |
| commit | a092aedb8115c16cb49bc64dd09cb20471ff942b (patch) | |
| tree | 7a1a867410c8cfdff4ec9fbb4f9ed8920bd8f2ef /arch/arm/kernel/setup.c | |
| parent | ARM: 8318/1: treat CPU feature register fields as signed quantities (diff) | |
| download | linux-a092aedb8115c16cb49bc64dd09cb20471ff942b.tar.xz linux-a092aedb8115c16cb49bc64dd09cb20471ff942b.zip | |
ARM: 8319/1: advertise availability of v8 Crypto instructions
When running the 32-bit ARM kernel on ARMv8 capable bare metal (e.g.,
32-bit Android userland and kernel on a Cortex-A53), or as a KVM guest
on a 64-bit host, we should advertise the availability of the Crypto
instructions, so that userland libraries such as OpenSSL may use them.
(Support for the v8 Crypto instructions in the 32-bit build was added
to OpenSSL more than six months ago)
This adds the ID feature bit detection, and sets elf_hwcap2 accordingly.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/setup.c')
| -rw-r--r-- | arch/arm/kernel/setup.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 637c449e6060..910bb1796946 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -376,6 +376,7 @@ void __init early_print(const char *str, ...) static void __init cpuid_init_hwcaps(void) { int block; + u32 isar5; if (cpu_architecture() < CPU_ARCH_ARMv7) return; @@ -390,6 +391,27 @@ static void __init cpuid_init_hwcaps(void) block = cpuid_feature_extract(CPUID_EXT_MMFR0, 0); if (block >= 5) elf_hwcap |= HWCAP_LPAE; + + /* check for supported v8 Crypto instructions */ + isar5 = read_cpuid_ext(CPUID_EXT_ISAR5); + + block = cpuid_feature_extract_field(isar5, 4); + if (block >= 2) + elf_hwcap2 |= HWCAP2_PMULL; + if (block >= 1) + elf_hwcap2 |= HWCAP2_AES; + + block = cpuid_feature_extract_field(isar5, 8); + if (block >= 1) + elf_hwcap2 |= HWCAP2_SHA1; + + block = cpuid_feature_extract_field(isar5, 12); + if (block >= 1) + elf_hwcap2 |= HWCAP2_SHA2; + + block = cpuid_feature_extract_field(isar5, 16); + if (block >= 1) + elf_hwcap2 |= HWCAP2_CRC32; } static void __init elf_hwcap_fixup(void) |