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author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2017-09-17 18:45:19 +0200 |
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committer | Kevin Hilman <khilman@baylibre.com> | 2017-10-29 16:29:21 +0100 |
commit | 0606326effc66201223de26d71c2779a108ee452 (patch) | |
tree | 758c4d35d76033364b7bf688ef36a79e04e7f0f3 /arch/arm/kernel/smp_scu.c | |
parent | dt-bindings: Amlogic: Add Meson8 and Meson8b SMP related documentation (diff) | |
download | linux-0606326effc66201223de26d71c2779a108ee452.tar.xz linux-0606326effc66201223de26d71c2779a108ee452.zip |
ARM: smp_scu: add a helper for powering on a specific CPU
To boot the secondary CPUs on the Amlogic Meson8/Meson8m2 (Cortex-A9)
and Meson8b (Cortex-A5) SoCs we have to enable SCU mode SCU_PM_NORMAL,
otherwise the secondary cores will not start.
This patch adds a scu_cpu_power_enable() function which can be used to
enable SCU_PM_NORMAL for a specific (logical) CPU. An internal helper
function is also created, to avoid code duplication with
scu_power_mode().
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm/kernel/smp_scu.c')
-rw-r--r-- | arch/arm/kernel/smp_scu.c | 35 |
1 files changed, 25 insertions, 10 deletions
diff --git a/arch/arm/kernel/smp_scu.c b/arch/arm/kernel/smp_scu.c index 72f9241ad5db..1d549c16b5fc 100644 --- a/arch/arm/kernel/smp_scu.c +++ b/arch/arm/kernel/smp_scu.c @@ -72,18 +72,12 @@ void scu_enable(void __iomem *scu_base) } #endif -/* - * Set the executing CPUs power mode as defined. This will be in - * preparation for it executing a WFI instruction. - * - * This function must be called with preemption disabled, and as it - * has the side effect of disabling coherency, caches must have been - * flushed. Interrupts must also have been disabled. - */ -int scu_power_mode(void __iomem *scu_base, unsigned int mode) +static int scu_set_power_mode_internal(void __iomem *scu_base, + unsigned int logical_cpu, + unsigned int mode) { unsigned int val; - int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(smp_processor_id()), 0); + int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(logical_cpu), 0); if (mode > 3 || mode == 1 || cpu > 3) return -EINVAL; @@ -94,3 +88,24 @@ int scu_power_mode(void __iomem *scu_base, unsigned int mode) return 0; } + +/* + * Set the executing CPUs power mode as defined. This will be in + * preparation for it executing a WFI instruction. + * + * This function must be called with preemption disabled, and as it + * has the side effect of disabling coherency, caches must have been + * flushed. Interrupts must also have been disabled. + */ +int scu_power_mode(void __iomem *scu_base, unsigned int mode) +{ + return scu_set_power_mode_internal(scu_base, smp_processor_id(), mode); +} + +/* + * Set the given (logical) CPU's power mode to SCU_PM_NORMAL. + */ +int scu_cpu_power_enable(void __iomem *scu_base, unsigned int cpu) +{ + return scu_set_power_mode_internal(scu_base, cpu, SCU_PM_NORMAL); +} |