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authorWill Deacon <will.deacon@arm.com>2013-02-28 17:48:11 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2013-03-03 23:54:15 +0100
commit862c588f062fe9339a180cf6429e4df1855c376a (patch)
tree20348a057421b00913563d103c1cd430d1a7bb6f /arch/arm/kernel/smp_tlb.c
parentARM: 7659/1: mm: make mm->context.id an atomic64_t variable (diff)
downloadlinux-862c588f062fe9339a180cf6429e4df1855c376a.tar.xz
linux-862c588f062fe9339a180cf6429e4df1855c376a.zip
ARM: 7660/1: tlb: add branch predictor maintenance operations
The ARM architecture requires explicit branch predictor maintenance when updating an instruction stream for a given virtual address. In reality, this isn't so much of a burden because the branch predictor is flushed during the cache maintenance required to make the new instructions visible to the I-side of the processor. However, there are still some cases where explicit flushing is required, so add a local_bp_flush_all operation to deal with this. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/smp_tlb.c')
-rw-r--r--arch/arm/kernel/smp_tlb.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/kernel/smp_tlb.c b/arch/arm/kernel/smp_tlb.c
index 02c5d2ce23bf..bd0300531399 100644
--- a/arch/arm/kernel/smp_tlb.c
+++ b/arch/arm/kernel/smp_tlb.c
@@ -64,6 +64,11 @@ static inline void ipi_flush_tlb_kernel_range(void *arg)
local_flush_tlb_kernel_range(ta->ta_start, ta->ta_end);
}
+static inline void ipi_flush_bp_all(void *ignored)
+{
+ local_flush_bp_all();
+}
+
void flush_tlb_all(void)
{
if (tlb_ops_need_broadcast())
@@ -127,3 +132,10 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end)
local_flush_tlb_kernel_range(start, end);
}
+void flush_bp_all(void)
+{
+ if (tlb_ops_need_broadcast())
+ on_each_cpu(ipi_flush_bp_all, NULL, 1);
+ else
+ local_flush_bp_all();
+}