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authorStephen Boyd <sboyd@codeaurora.org>2015-06-29 23:58:46 +0200
committerWill Deacon <will.deacon@arm.com>2015-07-31 16:01:14 +0200
commit8ae81c25cfe962a788a28e023d9a78934d807f7d (patch)
tree048ff49d92f0265483ce7c34ca229e88e48a5d2d /arch/arm/kernel
parentARM: 8402/1: perf: Don't use of_node after putting it (diff)
downloadlinux-8ae81c25cfe962a788a28e023d9a78934d807f7d.tar.xz
linux-8ae81c25cfe962a788a28e023d9a78934d807f7d.zip
arm: perf: Set affinity for PPI based PMUs
For PPI based PMUs, we bail out early in of_pmu_irq_cfg() without setting the PMU's supported_cpus bitmap. This causes the smp_call_function_any() in armv7_probe_num_events() to fail. Set the bitmap to be all CPUs so that we properly probe PMUs that use PPIs. Fixes: cc88116da0d1 ("arm: perf: treat PMUs as CPU affine") Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm/kernel')
-rw-r--r--arch/arm/kernel/perf_event.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 54272e0be713..7d5379c1c443 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -795,8 +795,10 @@ static int of_pmu_irq_cfg(struct arm_pmu *pmu)
/* Don't bother with PPIs; they're already affine */
irq = platform_get_irq(pdev, 0);
- if (irq >= 0 && irq_is_percpu(irq))
+ if (irq >= 0 && irq_is_percpu(irq)) {
+ cpumask_setall(&pmu->supported_cpus);
return 0;
+ }
irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL);
if (!irqs)