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| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2005-11-09 16:04:22 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2005-11-09 16:04:22 +0100 |
| commit | 59d1ff3bfb56d9b8cf3ec864857e6a4dfd9d2dba (patch) | |
| tree | e70623b924a8859182dc3326b6d5f7a5b9271504 /arch/arm/lib | |
| parent | Merge with ARM SMP tree (diff) | |
| download | linux-59d1ff3bfb56d9b8cf3ec864857e6a4dfd9d2dba.tar.xz linux-59d1ff3bfb56d9b8cf3ec864857e6a4dfd9d2dba.zip | |
[ARM] Clean up save_and_disable_irqs macro and allow use of ARMv6 CPSID
save_and_disable_irqs does not need to use mov + msr (which was
introduced to work around a documentation bug which was propagated
into binutils.) Use msr with an immediate constant, and if we're
building for ARMv6 or later, use the new CPSID instruction.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/lib')
| -rw-r--r-- | arch/arm/lib/bitops.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h index f35d91fbe117..b8c14e936697 100644 --- a/arch/arm/lib/bitops.h +++ b/arch/arm/lib/bitops.h @@ -34,7 +34,7 @@ and r2, r0, #7 mov r3, #1 mov r3, r3, lsl r2 - save_and_disable_irqs ip, r2 + save_and_disable_irqs ip ldrb r2, [r1, r0, lsr #3] \instr r2, r2, r3 strb r2, [r1, r0, lsr #3] @@ -54,7 +54,7 @@ add r1, r1, r0, lsr #3 and r3, r0, #7 mov r0, #1 - save_and_disable_irqs ip, r2 + save_and_disable_irqs ip ldrb r2, [r1] tst r2, r0, lsl r3 \instr r2, r2, r0, lsl r3 |