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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2011-11-17 18:41:28 +0100
committerNicolas Ferre <nicolas.ferre@atmel.com>2012-01-20 17:22:50 +0100
commit14f991a730f453a1c8f114ccb686f83e158fdd92 (patch)
treecebc0df6224f92f7e554b96bad2daf7e4fe13a64 /arch/arm/mach-at91/generic.h
parentARM: at91: make rstc soc independent (diff)
downloadlinux-14f991a730f453a1c8f114ccb686f83e158fdd92.tar.xz
linux-14f991a730f453a1c8f114ccb686f83e158fdd92.zip
ARM: at91: Fix at91sam9g45 and at91cap9 reset
As on the other sam9 we need to cleanly shutdown the DDRAM before rebooting. On those SoC the SDRAM/DDRAM controller is different. So, the assembly code ends up being not cleanly combined with previous at91sam9_alt_restart function. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/generic.h')
-rw-r--r--arch/arm/mach-at91/generic.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 62e508b71ec2..594133451c0c 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -60,6 +60,7 @@ extern void at91_irq_resume(void);
/* reset */
extern void at91_ioremap_rstc(u32 base_addr);
extern void at91sam9_alt_restart(char, const char *);
+extern void at91sam9g45_restart(char, const char *);
/* shutdown */
extern void at91_ioremap_shdwc(u32 base_addr);